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author | Dumitru Ceclan <mitrutzceclan@gmail.com> | 2024-07-31 15:37:22 +0300 |
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committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2024-08-03 16:01:47 +0100 |
commit | 96f9ab0d5933c1c00142dd052f259fce0bc3ced2 (patch) | |
tree | 005c6cc6ca5d57f372231861eb5b0282deda5f94 | |
parent | 70eac5c3c49195a323387ec237f17f9801cbdb25 (diff) | |
download | linux-stable-96f9ab0d5933c1c00142dd052f259fce0bc3ced2.tar.gz linux-stable-96f9ab0d5933c1c00142dd052f259fce0bc3ced2.tar.bz2 linux-stable-96f9ab0d5933c1c00142dd052f259fce0bc3ced2.zip |
iio: adc: ad7124: fix chip ID mismatch
The ad7124_soft_reset() function has the assumption that the chip will
assert the "power-on reset" bit in the STATUS register after a software
reset without any delay. The POR bit =0 is used to check if the chip
initialization is done.
A chip ID mismatch probe error appears intermittently when the probe
continues too soon and the ID register does not contain the expected
value.
Fix by adding a 200us delay after the software reset command is issued.
Fixes: b3af341bbd96 ("iio: adc: Add ad7124 support")
Signed-off-by: Dumitru Ceclan <dumitru.ceclan@analog.com>
Reviewed-by: Nuno Sa <nuno.sa@analog.com>
Link: https://patch.msgid.link/20240731-ad7124-fix-v1-1-46a76aa4b9be@analog.com
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
-rw-r--r-- | drivers/iio/adc/ad7124.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 3beed78496c5..c0b82f64c976 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -764,6 +764,7 @@ static int ad7124_soft_reset(struct ad7124_state *st) if (ret < 0) return ret; + fsleep(200); timeout = 100; do { ret = ad_sd_read_reg(&st->sd, AD7124_STATUS, 1, &readval); |