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author | Marek Vasut <marex@denx.de> | 2021-06-21 00:49:46 +0200 |
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committer | Sam Ravnborg <sam@ravnborg.org> | 2021-07-27 21:15:24 +0200 |
commit | 5e23c98178eb1a2cdb7c4fee9a39baf8cabf282d (patch) | |
tree | dfb28c5011c3fa892c42097ad1e6d7bcf7328d0c | |
parent | b776b0f00f246d093c595bac4453c6e51541d5c5 (diff) | |
download | linux-stable-5e23c98178eb1a2cdb7c4fee9a39baf8cabf282d.tar.gz linux-stable-5e23c98178eb1a2cdb7c4fee9a39baf8cabf282d.tar.bz2 linux-stable-5e23c98178eb1a2cdb7c4fee9a39baf8cabf282d.zip |
drm: mxsfb: Clear FIFO_CLEAR bit
Make sure the FIFO_CLEAR bit is latched in when configuring the
controller, so that the FIFO is really cleared. And then clear
the FIFO_CLEAR bit, since it is not self-clearing.
Fixes: 45d59d704080 ("drm: Add new driver for MXSFB controller")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Abrecht <public@danielabrecht.ch>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Stefan Agner <stefan@agner.ch>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # i.Core MX8MM
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210620224946.189524-1-marex@denx.de
-rw-r--r-- | drivers/gpu/drm/mxsfb/mxsfb_kms.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_kms.c b/drivers/gpu/drm/mxsfb/mxsfb_kms.c index 4501deb48e6b..89dd618d78f3 100644 --- a/drivers/gpu/drm/mxsfb/mxsfb_kms.c +++ b/drivers/gpu/drm/mxsfb/mxsfb_kms.c @@ -241,6 +241,9 @@ static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb, /* Clear the FIFOs */ writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_SET); + readl(mxsfb->base + LCDC_CTRL1); + writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_CLR); + readl(mxsfb->base + LCDC_CTRL1); if (mxsfb->devdata->has_overlay) writel(0, mxsfb->base + LCDC_AS_CTRL); |