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authorPatrice Chotard <patrice.chotard@st.com>2016-08-10 09:39:09 +0200
committerLee Jones <lee.jones@linaro.org>2016-08-10 09:23:49 +0100
commit6936e1f88d233444ac8010d9b6bfaac3ba698ee2 (patch)
tree3b786c66acb4d0fd948794897e0e9093afcfeb1a
parent287849cb3814a5077c79a2489bef055c9f5e656c (diff)
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gpio: stmpe: Write int status register only when needed
On STMPE801/1801 datasheets, it's mentionned writing in interrupt status register has no effect, bits are cleared when reading. Signed-off-by: Amelie DELAUNAY <amelie.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
-rw-r--r--drivers/gpio/gpio-stmpe.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c
index fdac5d9e5b8d..5806af549ddf 100644
--- a/drivers/gpio/gpio-stmpe.c
+++ b/drivers/gpio/gpio-stmpe.c
@@ -371,12 +371,16 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev)
stat &= ~(1 << bit);
}
- stmpe_reg_write(stmpe, statmsbreg + i, status[i]);
-
- /* Edge detect register is not present on 801 and 1801 */
- if (stmpe->partnum != STMPE801 || stmpe->partnum != STMPE1801)
+ /*
+ * interrupt status register write has no effect on
+ * 801 and 1801, bits are cleared when read.
+ * Edge detect register is not present on 801 and 1801
+ */
+ if (stmpe->partnum != STMPE801 || stmpe->partnum != STMPE1801) {
+ stmpe_reg_write(stmpe, statmsbreg + i, status[i]);
stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_GPEDR_MSB]
+ i, status[i]);
+ }
}
return IRQ_HANDLED;