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author | Kristina Martsenko <kristina.martsenko@arm.com> | 2017-05-03 16:37:47 +0100 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2017-05-09 17:26:59 +0100 |
commit | 276e93279a630657fff4b086ba14c95955912dfa (patch) | |
tree | 4871c3231215830fa237e359d3be1a87165bc7ea /Documentation/arm64 | |
parent | 7dcd9dd8cebe9fa626af7e2358d03a37041a70fb (diff) | |
download | linux-stable-276e93279a630657fff4b086ba14c95955912dfa.tar.gz linux-stable-276e93279a630657fff4b086ba14c95955912dfa.tar.bz2 linux-stable-276e93279a630657fff4b086ba14c95955912dfa.zip |
arm64: entry: improve data abort handling of tagged pointers
When handling a data abort from EL0, we currently zero the top byte of
the faulting address, as we assume the address is a TTBR0 address, which
may contain a non-zero address tag. However, the address may be a TTBR1
address, in which case we should not zero the top byte. This patch fixes
that. The effect is that the full TTBR1 address is passed to the task's
signal handler (or printed out in the kernel log).
When handling a data abort from EL1, we leave the faulting address
intact, as we assume it's either a TTBR1 address or a TTBR0 address with
tag 0x00. This is true as far as I'm aware, we don't seem to access a
tagged TTBR0 address anywhere in the kernel. Regardless, it's easy to
forget about address tags, and code added in the future may not always
remember to remove tags from addresses before accessing them. So add tag
handling to the EL1 data abort handler as well. This also makes it
consistent with the EL0 data abort handler.
Fixes: d50240a5f6ce ("arm64: mm: permit use of tagged pointers at EL0")
Cc: <stable@vger.kernel.org> # 3.12.x-
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'Documentation/arm64')
0 files changed, 0 insertions, 0 deletions