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author | Paul Walmsley <paul@pwsan.com> | 2011-07-10 05:56:54 -0600 |
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committer | Paul Walmsley <paul@pwsan.com> | 2011-07-10 05:56:54 -0600 |
commit | 32a363c0f5b44cb4e9adfe238dfc4efa9270f7ae (patch) | |
tree | 85ce4e4b5aceea3515dffc9e79448ac5088d312d /arch/arm/mach-omap2/clockdomain.h | |
parent | 113a74137f5c85f2c7914e78350f70247ef9447c (diff) | |
download | linux-stable-32a363c0f5b44cb4e9adfe238dfc4efa9270f7ae.tar.gz linux-stable-32a363c0f5b44cb4e9adfe238dfc4efa9270f7ae.tar.bz2 linux-stable-32a363c0f5b44cb4e9adfe238dfc4efa9270f7ae.zip |
OMAP2+: clockdomain: add clkdm_in_hwsup()
Add a new function, clkdm_in_hwsup(), that returns true if a clockdomain
is configured for hardware-supervised idle. It does not actually read the
hardware; rather, it checks an internal flag in the struct clockdomain, which
is changed when the clockdomain is switched in and out of hardware-supervised
idle. This should be safe, since all changes to the idle mode should
pass through the clockdomain code.
Based on a set of patches by Rajendra Nayak <rnayak@ti.com> which do
the same thing by checking the hardware bits. This approach should be
faster and more compact.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Todd Poynor <toddpoynor@google.com>
Cc: BenoƮt Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/clockdomain.h')
-rw-r--r-- | arch/arm/mach-omap2/clockdomain.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 8e0da642355c..8782a5cadfa6 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -83,6 +83,9 @@ struct clkdm_dep { const struct omap_chip_id omap_chip; }; +/* Possible flags for struct clockdomain._flags */ +#define _CLKDM_FLAG_HWSUP_ENABLED BIT(0) + /** * struct clockdomain - OMAP clockdomain * @name: clockdomain name @@ -90,6 +93,7 @@ struct clkdm_dep { * @clktrctrl_reg: CLKSTCTRL reg for the given clock domain * @clktrctrl_mask: CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg * @flags: Clockdomain capability flags + * @_flags: Flags for use only by internal clockdomain code * @dep_bit: Bit shift of this clockdomain's PM_WKDEP/CM_SLEEPDEP bit * @prcm_partition: (OMAP4 only) PRCM partition ID for this clkdm's registers * @cm_inst: (OMAP4 only) CM instance register offset @@ -114,6 +118,7 @@ struct clockdomain { } pwrdm; const u16 clktrctrl_mask; const u8 flags; + u8 _flags; const u8 dep_bit; const u8 prcm_partition; const s16 cm_inst; @@ -178,6 +183,7 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm); void clkdm_allow_idle(struct clockdomain *clkdm); void clkdm_deny_idle(struct clockdomain *clkdm); +bool clkdm_in_hwsup(struct clockdomain *clkdm); int clkdm_wakeup(struct clockdomain *clkdm); int clkdm_sleep(struct clockdomain *clkdm); |