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| author | Marc Zyngier <marc.zyngier@arm.com> | 2018-01-02 18:19:39 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2018-01-08 18:45:19 +0000 |
| commit | 95e3de3590e3f2358bb13f013911bc1bfa5d3f53 (patch) | |
| tree | ac213453703987064269bb32c3a902d57a6013d9 /arch/arm64/kernel/entry.S | |
| parent | d68e3ba5303f7e1099f51fdcd155f5263da8569b (diff) | |
| download | linux-stable-95e3de3590e3f2358bb13f013911bc1bfa5d3f53.tar.gz linux-stable-95e3de3590e3f2358bb13f013911bc1bfa5d3f53.tar.bz2 linux-stable-95e3de3590e3f2358bb13f013911bc1bfa5d3f53.zip | |
arm64: Move post_ttbr_update_workaround to C code
We will soon need to invoke a CPU-specific function pointer after changing
page tables, so move post_ttbr_update_workaround out into C code to make
this possible.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/entry.S')
| -rw-r--r-- | arch/arm64/kernel/entry.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 6ceed4877daf..80b539845da6 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -277,7 +277,7 @@ alternative_else_nop_endif * Cavium erratum 27456 (broadcast TLBI instructions may cause I-cache * corruption). */ - post_ttbr_update_workaround + bl post_ttbr_update_workaround .endif 1: .if \el != 0 |