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author | Sandeepa Prabhu <sandeepa.s.prabhu@gmail.com> | 2016-07-08 12:35:51 -0400 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2016-07-19 15:03:21 +0100 |
commit | 39a67d49ba353630d144a8eb775500c041c89e7a (patch) | |
tree | 8a15a87c630a2710e2acdbcd0a0fc627999276f8 /arch/arm64/kernel/insn.c | |
parent | 888b3c8720e0a4033db09ba2364afde6a4763638 (diff) | |
download | linux-stable-39a67d49ba353630d144a8eb775500c041c89e7a.tar.gz linux-stable-39a67d49ba353630d144a8eb775500c041c89e7a.tar.bz2 linux-stable-39a67d49ba353630d144a8eb775500c041c89e7a.zip |
arm64: kprobes instruction simulation support
Kprobes needs simulation of instructions that cannot be stepped
from a different memory location, e.g.: those instructions
that uses PC-relative addressing. In simulation, the behaviour
of the instruction is implemented using a copy of pt_regs.
The following instruction categories are simulated:
- All branching instructions(conditional, register, and immediate)
- Literal access instructions(load-literal, adr/adrp)
Conditional execution is limited to branching instructions in
ARM v8. If conditions at PSTATE do not match the condition fields
of opcode, the instruction is effectively NOP.
Thanks to Will Cohen for assorted suggested changes.
Signed-off-by: Sandeepa Prabhu <sandeepa.s.prabhu@gmail.com>
Signed-off-by: William Cohen <wcohen@redhat.com>
Signed-off-by: David A. Long <dave.long@linaro.org>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
[catalin.marinas@arm.com: removed linux/module.h include]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/insn.c')
-rw-r--r-- | arch/arm64/kernel/insn.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c index 5cb2f3db3da5..63f9432d05e8 100644 --- a/arch/arm64/kernel/insn.c +++ b/arch/arm64/kernel/insn.c @@ -30,6 +30,7 @@ #include <asm/cacheflush.h> #include <asm/debug-monitors.h> #include <asm/fixmap.h> +#include <asm/opcodes.h> #include <asm/insn.h> #define AARCH64_INSN_SF_BIT BIT(31) |