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| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2023-02-28 22:17:42 +0530 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-05-11 23:03:09 +0900 |
| commit | c8178285ba1a0ce9a8f9ad86f212dd9fb3877530 (patch) | |
| tree | 0dddd7fb42753455c651503e10ce1cf9e19fc17e /arch/arm64 | |
| parent | 7803b357d9e2772201759afb1ef7a31249627ab0 (diff) | |
| download | linux-stable-c8178285ba1a0ce9a8f9ad86f212dd9fb3877530.tar.gz linux-stable-c8178285ba1a0ce9a8f9ad86f212dd9fb3877530.tar.bz2 linux-stable-c8178285ba1a0ce9a8f9ad86f212dd9fb3877530.zip | |
arm64: dts: qcom: ipq6018: Fix the PCI I/O port range
[ Upstream commit 75a6e1fdb351189f55097741e8460ca3f9b2883f ]
For 64KiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x10000. Hence, fix the bogus PCI address
(0x20200000) specified in the ranges property for I/O region.
While at it, let's use the missing 0x prefix for the addresses.
Fixes: 095bbdd9a5c3 ("arm64: dts: qcom: ipq6018: Add pcie support")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-7-manivannan.sadhasivam@linaro.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/ipq6018.dtsi | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index a7c7ca980a71..c3492a383155 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -436,10 +436,8 @@ phys = <&pcie_phy0>; phy-names = "pciephy"; - ranges = <0x81000000 0 0x20200000 0 0x20200000 - 0 0x10000>, /* downstream I/O */ - <0x82000000 0 0x20220000 0 0x20220000 - 0 0xfde0000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x0 0x20200000 0x0 0x10000>, + <0x82000000 0x0 0x20220000 0x0 0x20220000 0x0 0xfde0000>; interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "msi"; |