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| author | Jan Beulich <JBeulich@suse.com> | 2012-02-24 11:55:01 +0000 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2012-02-24 11:46:28 -0800 |
| commit | 69466466ce889cd2cbc8cda9ff1c6083f48cc7f9 (patch) | |
| tree | 0564f1bb25de9c08a01e3d6247898b10c0805f1d /arch/x86 | |
| parent | b893485db994b17402524d3d700b950294cb6c97 (diff) | |
| download | linux-stable-69466466ce889cd2cbc8cda9ff1c6083f48cc7f9.tar.gz linux-stable-69466466ce889cd2cbc8cda9ff1c6083f48cc7f9.tar.bz2 linux-stable-69466466ce889cd2cbc8cda9ff1c6083f48cc7f9.zip | |
x86-64: Improve insn scheduling in SAVE_ARGS_IRQ
In one case, use an address register that was computed earlier (and
with a simpler instruction), thus reducing the risk of a stall.
In the second case, eliminate a branch by using a conditional move (as
is already done in call_softirq and xen_do_hypervisor_callback).
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Link: http://lkml.kernel.org/r/4F4788A50200007800074A26@nat28.tlf.novell.com
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/kernel/entry_64.S | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index a20e1cb9dc87..211b2e1683f1 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S @@ -319,7 +319,7 @@ ENDPROC(native_usergs_sysret64) movq %rsp, %rsi leaq -RBP(%rsp),%rdi /* arg1 for handler */ - testl $3, CS(%rdi) + testl $3, CS-RBP(%rsi) je 1f SWAPGS /* @@ -329,11 +329,10 @@ ENDPROC(native_usergs_sysret64) * moving irq_enter into assembly, which would be too much work) */ 1: incl PER_CPU_VAR(irq_count) - jne 2f - mov PER_CPU_VAR(irq_stack_ptr),%rsp + cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp CFI_DEF_CFA_REGISTER rsi -2: /* Store previous stack value */ + /* Store previous stack value */ pushq %rsi CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \ 0x77 /* DW_OP_breg7 */, 0, \ |