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author | Joel Stanley <joel@jms.id.au> | 2018-03-14 17:43:12 +1030 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2018-03-14 10:05:28 +0100 |
commit | 9bdc00a5c16f5d5306756afdbe2811be4061c945 (patch) | |
tree | 83573579bc8d04a711fb9c5fd5e95c5a0c5e7c66 /arch | |
parent | aa110a22b49d699aa1c1416776afc786fcc3148b (diff) | |
download | linux-stable-9bdc00a5c16f5d5306756afdbe2811be4061c945.tar.gz linux-stable-9bdc00a5c16f5d5306756afdbe2811be4061c945.tar.bz2 linux-stable-9bdc00a5c16f5d5306756afdbe2811be4061c945.zip |
ARM: dts: aspeed: Add default memory node
When we removed the inclusion of skeleton.dtsi from the device trees, we
broke booting for systems with bootloaders that aren't device tre aware.
This can be seen, for example, when appending the device tree blob to
the kernel image.
The reason booting broke was that the kernel lacked the device_type
label in the memory node. Add in a default memory node wth the
device_type. It can contain the memory address as the location is fixed
for each SoC generation, but the size needs to be added by the
bootloader or the board specific dts.
Fixes: 73102d6fdc32 ("ARM: dts: aspeed: Remove skeleton.dtsi")
Cc: <stable@vger.kernel.org>
Reported-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/aspeed-g4.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/aspeed-g5.dtsi | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index b0d8431a3700..ae2b8c952e80 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -42,6 +42,11 @@ }; }; + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0>; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 40de3b66c33f..2477ebc11d9d 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -42,6 +42,11 @@ }; }; + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0>; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; |