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| author | Borislav Petkov <bp@suse.de> | 2017-07-25 11:07:03 +0200 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2017-08-21 17:54:57 +0200 |
| commit | f3c0891c2feafa008cc35d6ffb8cf593df66c867 (patch) | |
| tree | 6397f1f8635c3dc2fb2b92790b28ca1b23271f2e /drivers/edac | |
| parent | 4ab1784b48b384e52a6539ab10201fed7a3127f5 (diff) | |
| download | linux-stable-f3c0891c2feafa008cc35d6ffb8cf593df66c867.tar.gz linux-stable-f3c0891c2feafa008cc35d6ffb8cf593df66c867.tar.bz2 linux-stable-f3c0891c2feafa008cc35d6ffb8cf593df66c867.zip | |
EDAC, mce_amd: Get rid of most struct cpuinfo_x86 uses
struct mce.cpuid contains CPUID(1).EAX which contains family, model and
stepping and thus has enough information for our purposes. Thus get rid
of some external dependencies which are not really needed.
No functionality change.
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'drivers/edac')
| -rw-r--r-- | drivers/edac/mce_amd.c | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c index 94cadd7f69e9..c0ae47a5c7b7 100644 --- a/drivers/edac/mce_amd.c +++ b/drivers/edac/mce_amd.c @@ -1,6 +1,8 @@ #include <linux/module.h> #include <linux/slab.h> +#include <asm/cpu.h> + #include "mce_amd.h" static struct amd_decoder_ops *fam_ops; @@ -744,7 +746,7 @@ static void decode_mc3_mce(struct mce *m) static void decode_mc4_mce(struct mce *m) { - struct cpuinfo_x86 *c = &boot_cpu_data; + unsigned int fam = x86_family(m->cpuid); int node_id = amd_get_nb_id(m->extcpu); u16 ec = EC(m->status); u8 xec = XEC(m->status, 0x1f); @@ -758,7 +760,7 @@ static void decode_mc4_mce(struct mce *m) /* special handling for DRAM ECCs */ if (xec == 0x0 || xec == 0x8) { /* no ECCs on F11h */ - if (c->x86 == 0x11) + if (fam == 0x11) goto wrong_mc4_mce; pr_cont("%s.\n", mc4_mce_desc[xec]); @@ -779,7 +781,7 @@ static void decode_mc4_mce(struct mce *m) return; case 0x19: - if (boot_cpu_data.x86 == 0x15 || boot_cpu_data.x86 == 0x16) + if (fam == 0x15 || fam == 0x16) pr_cont("Compute Unit Data Error.\n"); else goto wrong_mc4_mce; @@ -802,11 +804,11 @@ static void decode_mc4_mce(struct mce *m) static void decode_mc5_mce(struct mce *m) { - struct cpuinfo_x86 *c = &boot_cpu_data; + unsigned int fam = x86_family(m->cpuid); u16 ec = EC(m->status); u8 xec = XEC(m->status, xec_mask); - if (c->x86 == 0xf || c->x86 == 0x11) + if (fam == 0xf || fam == 0x11) goto wrong_mc5_mce; pr_emerg(HW_ERR "MC5 Error: "); @@ -859,7 +861,7 @@ static void decode_smca_error(struct mce *m) if (m->bank >= ARRAY_SIZE(smca_banks)) return; - if (boot_cpu_data.x86 >= 0x17 && m->bank == 4) + if (x86_family(m->cpuid) >= 0x17 && m->bank == 4) pr_emerg(HW_ERR "Bank 4 is reserved on Fam17h.\n"); hwid = smca_banks[m->bank].hwid; @@ -942,7 +944,7 @@ static int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data) { struct mce *m = (struct mce *)data; - struct cpuinfo_x86 *c = &cpu_data(m->extcpu); + unsigned int fam = x86_family(m->cpuid); int ecc; if (amd_filter_mce(m)) @@ -952,7 +954,7 @@ amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data) pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s", m->extcpu, - c->x86, c->x86_model, c->x86_mask, + fam, x86_model(m->cpuid), x86_stepping(m->cpuid), m->bank, ((m->status & MCI_STATUS_OVER) ? "Over" : "-"), ((m->status & MCI_STATUS_UC) ? "UE" : @@ -961,11 +963,11 @@ amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data) ((m->status & MCI_STATUS_PCC) ? "PCC" : "-"), ((m->status & MCI_STATUS_ADDRV) ? "AddrV" : "-")); - if (c->x86 >= 0x15) { + if (fam >= 0x15) { pr_cont("|%s", (m->status & MCI_STATUS_DEFERRED ? "Deferred" : "-")); /* F15h, bank4, bit 43 is part of McaStatSubCache. */ - if (c->x86 != 0x15 || m->bank != 4) + if (fam != 0x15 || m->bank != 4) pr_cont("|%s", (m->status & MCI_STATUS_POISON ? "Poison" : "-")); } |