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author | Hersen Wu <hersenxs.wu@amd.com> | 2017-10-31 15:55:15 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-12-06 12:47:33 -0500 |
commit | 631aaa0af4be3de8f0184095075650afaa023334 (patch) | |
tree | a359b5fb27349e6f7d41a6ce123099f2c94f3bc8 /drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c | |
parent | 0af4096db9ec6a7b12475bf8d21ee5464722c7a2 (diff) | |
download | linux-stable-631aaa0af4be3de8f0184095075650afaa023334.tar.gz linux-stable-631aaa0af4be3de8f0184095075650afaa023334.tar.bz2 linux-stable-631aaa0af4be3de8f0184095075650afaa023334.zip |
drm/amd/display: send display_count msg so SMU can enter S0i2
SMU can future lower voltages in long idle case when all display is off.
If all display output is turned off via DPMS, send display_count = 0
after all output are turned off.
otherwise send display_count msg before turning on display to make sure
SMU exit S0i2 state. before is not neccessary as we are out of S0i2
when driver execute code, but send message before anyways for correctness.
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c index e7a694835e3e..469af0587604 100644 --- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c @@ -148,5 +148,7 @@ void dce100_hw_sequencer_construct(struct dc *dc) dc->hwss.enable_display_power_gating = dce100_enable_display_power_gating; dc->hwss.set_bandwidth = dce100_set_bandwidth; + dc->hwss.pplib_apply_display_requirements = + dce100_pplib_apply_display_requirements; } |