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| author | Joseph Greathouse <Joseph.Greathouse@amd.com> | 2021-06-29 21:08:52 -0500 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-07-19 08:53:14 +0200 |
| commit | d05c9f91be93fc12f61b6e7d59d0b20a7d1274d0 (patch) | |
| tree | 4b20bad0b1377a0e1427d50577888f563f6a18ee /drivers/gpu/drm | |
| parent | a5cd290599168960bf27def8fa405a0614e3cfd4 (diff) | |
| download | linux-stable-d05c9f91be93fc12f61b6e7d59d0b20a7d1274d0.tar.gz linux-stable-d05c9f91be93fc12f61b6e7d59d0b20a7d1274d0.tar.bz2 linux-stable-d05c9f91be93fc12f61b6e7d59d0b20a7d1274d0.zip | |
drm/amdgpu: Update NV SIMD-per-CU to 2
commit aa6158112645aae514982ad8d56df64428fcf203 upstream.
Navi series GPUs have 2 SIMDs per CU (and then 2 CUs per WGP).
The NV enum headers incorrectly listed this as 4, which later meant
we were incorrectly reporting the number of SIMDs in the HSA
topology. This could cause problems down the line for user-space
applications that want to launch a fixed amount of work to each
SIMD.
Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/amd/include/navi10_enum.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/include/navi10_enum.h b/drivers/gpu/drm/amd/include/navi10_enum.h index d5ead9680c6e..84bcb96f76ea 100644 --- a/drivers/gpu/drm/amd/include/navi10_enum.h +++ b/drivers/gpu/drm/amd/include/navi10_enum.h @@ -430,7 +430,7 @@ ARRAY_2D_DEPTH = 0x00000001, */ typedef enum ENUM_NUM_SIMD_PER_CU { -NUM_SIMD_PER_CU = 0x00000004, +NUM_SIMD_PER_CU = 0x00000002, } ENUM_NUM_SIMD_PER_CU; /* |