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authorMikko Perttunen <mperttunen@nvidia.com>2017-08-02 12:55:04 +0300
committerThierry Reding <treding@nvidia.com>2017-08-17 17:57:06 +0200
commit18b3f5ac6b55f5f3f60723a58f14ec235a5b8cfe (patch)
tree6df28c06121a5f178635f5cb1e2a7d911d70039b /drivers/gpu/host1x/job.c
parent5771a8c08880cdca3bfb4a3fc6d309d6bba20877 (diff)
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gpu: host1x: Don't fail on NULL bo physical address
Pinning a Host1x BO currently cannot fail and zero is a valid address for a BO when IOMMU is enabled. To avoid false errors remove checks for NULL BO physical addresses. Fixes: 404bfb78daf3 ("gpu: host1x: Add IOMMU support") Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/host1x/job.c')
-rw-r--r--drivers/gpu/host1x/job.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/gpu/host1x/job.c b/drivers/gpu/host1x/job.c
index bee504406cfc..db509ab8874e 100644
--- a/drivers/gpu/host1x/job.c
+++ b/drivers/gpu/host1x/job.c
@@ -197,10 +197,6 @@ static unsigned int pin_job(struct host1x *host, struct host1x_job *job)
}
phys_addr = host1x_bo_pin(reloc->target.bo, &sgt);
- if (!phys_addr) {
- err = -EINVAL;
- goto unpin;
- }
job->addr_phys[job->num_unpins] = phys_addr;
job->unpins[job->num_unpins].bo = reloc->target.bo;
@@ -225,10 +221,6 @@ static unsigned int pin_job(struct host1x *host, struct host1x_job *job)
}
phys_addr = host1x_bo_pin(g->bo, &sgt);
- if (!phys_addr) {
- err = -EINVAL;
- goto unpin;
- }
if (!IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL) && host->domain) {
for_each_sg(sgt->sgl, sg, sgt->nents, j)