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author | Wanpeng Li <wanpeng.li@hotmail.com> | 2017-11-05 16:54:47 -0800 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-02-03 17:38:56 +0100 |
commit | 4f5500a63455815c45b28aa740fce91b49630188 (patch) | |
tree | 58b8c742c38826de147550d8e1ce8cbf32c75ca3 /drivers/hwmon/abx500.h | |
parent | df54fc5c28d2921ae4eb0d3401db929cb0c62e56 (diff) | |
download | linux-stable-4f5500a63455815c45b28aa740fce91b49630188.tar.gz linux-stable-4f5500a63455815c45b28aa740fce91b49630188.tar.bz2 linux-stable-4f5500a63455815c45b28aa740fce91b49630188.zip |
KVM: X86: Fix operand/address-size during instruction decoding
[ Upstream commit 3853be2603191829b442b64dac6ae8ba0c027bf9 ]
Pedro reported:
During tests that we conducted on KVM, we noticed that executing a "PUSH %ES"
instruction under KVM produces different results on both memory and the SP
register depending on whether EPT support is enabled. With EPT the SP is
reduced by 4 bytes (and the written value is 0-padded) but without EPT support
it is only reduced by 2 bytes. The difference can be observed when the CS.DB
field is 1 (32-bit) but not when it's 0 (16-bit).
The internal segment descriptor cache exist even in real/vm8096 mode. The CS.D
also should be respected instead of just default operand/address-size/66H
prefix/67H prefix during instruction decoding. This patch fixes it by also
adjusting operand/address-size according to CS.D.
Reported-by: Pedro Fonseca <pfonseca@cs.washington.edu>
Tested-by: Pedro Fonseca <pfonseca@cs.washington.edu>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Nadav Amit <nadav.amit@gmail.com>
Cc: Pedro Fonseca <pfonseca@cs.washington.edu>
Signed-off-by: Wanpeng Li <wanpeng.li@hotmail.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwmon/abx500.h')
0 files changed, 0 insertions, 0 deletions