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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-01-09 02:29:25 +0200 |
|---|---|---|
| committer | Georgi Djakov <djakov@kernel.org> | 2023-01-18 16:12:17 +0200 |
| commit | 1c0c93d04efbbb7b141eef4ecc2fa8d0ba7815de (patch) | |
| tree | 1221b92041d59d0b5d25e1b2ef5e2e3646c510b3 /drivers/interconnect | |
| parent | 7d6d7bfd4cb901120c9ffb0703b23faa9bb169fb (diff) | |
| download | linux-stable-1c0c93d04efbbb7b141eef4ecc2fa8d0ba7815de.tar.gz linux-stable-1c0c93d04efbbb7b141eef4ecc2fa8d0ba7815de.tar.bz2 linux-stable-1c0c93d04efbbb7b141eef4ecc2fa8d0ba7815de.zip | |
interconnect: qcom: sc7180: drop IP0 remnants
Drop two defines leftover from the commit 2f3724930eb4 ("interconnect:
qcom: sc7180: Drop IP0 interconnects"), which dropped handling of the
IP0 resource in favour of handling it in the clk-rpmh driver.
Fixes: 2f3724930eb4 ("interconnect: qcom: sc7180: Drop IP0 interconnects")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230109002935.244320-3-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Diffstat (limited to 'drivers/interconnect')
| -rw-r--r-- | drivers/interconnect/qcom/sc7180.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/interconnect/qcom/sc7180.h b/drivers/interconnect/qcom/sc7180.h index c6212a10c2f6..7a2b3eb00923 100644 --- a/drivers/interconnect/qcom/sc7180.h +++ b/drivers/interconnect/qcom/sc7180.h @@ -11,7 +11,7 @@ #define SC7180_MASTER_APPSS_PROC 0 #define SC7180_MASTER_SYS_TCU 1 #define SC7180_MASTER_NPU_SYS 2 -#define SC7180_MASTER_IPA_CORE 3 +/* 3 was used by MASTER_IPA_CORE, now represented as RPMh clock */ #define SC7180_MASTER_LLCC 4 #define SC7180_MASTER_A1NOC_CFG 5 #define SC7180_MASTER_A2NOC_CFG 6 @@ -58,7 +58,7 @@ #define SC7180_MASTER_USB3 47 #define SC7180_MASTER_EMMC 48 #define SC7180_SLAVE_EBI1 49 -#define SC7180_SLAVE_IPA_CORE 50 +/* 50 was used by SLAVE_IPA_CORE, now represented as RPMh clock */ #define SC7180_SLAVE_A1NOC_CFG 51 #define SC7180_SLAVE_A2NOC_CFG 52 #define SC7180_SLAVE_AHB2PHY_SOUTH 53 |