summaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl/pinctrl-microchip-sgpio.c
diff options
context:
space:
mode:
authorMichael Walle <michael@walle.cc>2022-02-26 21:45:06 +0100
committerLinus Walleij <linus.walleij@linaro.org>2022-03-15 01:55:58 +0100
commit2560c681999c9d33eb32b208de6a607622867c95 (patch)
treecb30933467d541df83f874e27ce46ed2be2643d0 /drivers/pinctrl/pinctrl-microchip-sgpio.c
parent0e68328edb3227cd00681671843c3d4113083456 (diff)
downloadlinux-stable-2560c681999c9d33eb32b208de6a607622867c95.tar.gz
linux-stable-2560c681999c9d33eb32b208de6a607622867c95.tar.bz2
linux-stable-2560c681999c9d33eb32b208de6a607622867c95.zip
pinctrl: microchip-sgpio: return error in spgio_output_set()
Make sgpio_output_set() return an error value. Don't just ignore the return value of any regmap access but propagate it to our callers. Even if the accesses never fail, this is a preparation patch to add single shot mode where we need to poll a bit and thus we might get -ETIMEDOUT. Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20220226204507.2511633-5-michael@walle.cc Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-microchip-sgpio.c')
-rw-r--r--drivers/pinctrl/pinctrl-microchip-sgpio.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/pinctrl/pinctrl-microchip-sgpio.c b/drivers/pinctrl/pinctrl-microchip-sgpio.c
index c5d0663148ac..53e4e6699c48 100644
--- a/drivers/pinctrl/pinctrl-microchip-sgpio.c
+++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c
@@ -224,9 +224,9 @@ static inline void sgpio_configure_clock(struct sgpio_priv *priv, u32 clkfrq)
sgpio_clrsetbits(priv, REG_SIO_CLOCK, 0, clr, set);
}
-static void sgpio_output_set(struct sgpio_priv *priv,
- struct sgpio_port_addr *addr,
- int value)
+static int sgpio_output_set(struct sgpio_priv *priv,
+ struct sgpio_port_addr *addr,
+ int value)
{
unsigned int bit = SGPIO_SRC_BITS * addr->bit;
u32 clr, set;
@@ -245,10 +245,12 @@ static void sgpio_output_set(struct sgpio_priv *priv,
set = FIELD_PREP(SGPIO_SPARX5_BIT_SOURCE, value << bit);
break;
default:
- return;
+ return -EINVAL;
}
sgpio_clrsetbits(priv, REG_PORT_CONFIG, addr->port, clr, set);
+
+ return 0;
}
static int sgpio_output_get(struct sgpio_priv *priv,
@@ -334,7 +336,7 @@ static int sgpio_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
case PIN_CONFIG_OUTPUT:
if (bank->is_input)
return -EINVAL;
- sgpio_output_set(priv, &addr, arg);
+ err = sgpio_output_set(priv, &addr, arg);
break;
default:
@@ -474,9 +476,7 @@ static int microchip_sgpio_direction_output(struct gpio_chip *gc,
sgpio_pin_to_addr(priv, gpio, &addr);
- sgpio_output_set(priv, &addr, value);
-
- return 0;
+ return sgpio_output_set(priv, &addr, value);
}
static int microchip_sgpio_get_direction(struct gpio_chip *gc, unsigned int gpio)