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| author | Boris Brezillon <boris.brezillon@free-electrons.com> | 2016-12-01 20:27:21 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-12-08 14:55:04 -0800 |
| commit | 68af4fa8f39b542a6cde7ac19518d88e9b3099dc (patch) | |
| tree | beb0bea999031d0dcd4729dd6307e9d48ca4c33c /drivers | |
| parent | 035cd485a47dda64f25ccf8a90b11a07d0b7aa7a (diff) | |
| download | linux-stable-68af4fa8f39b542a6cde7ac19518d88e9b3099dc.tar.gz linux-stable-68af4fa8f39b542a6cde7ac19518d88e9b3099dc.tar.bz2 linux-stable-68af4fa8f39b542a6cde7ac19518d88e9b3099dc.zip | |
clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
bcm2835_pll_divider_off() is resetting the divider field in the A2W reg
to zero when disabling the clock.
Make sure we preserve this value by reading the previous a2w_reg value
first and ORing the result with A2W_PLL_CHANNEL_DISABLE.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
Cc: <stable@vger.kernel.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/bcm/clk-bcm2835.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index 836d07550be3..2acaa77ad482 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -751,7 +751,9 @@ static void bcm2835_pll_divider_off(struct clk_hw *hw) cprman_write(cprman, data->cm_reg, (cprman_read(cprman, data->cm_reg) & ~data->load_mask) | data->hold_mask); - cprman_write(cprman, data->a2w_reg, A2W_PLL_CHANNEL_DISABLE); + cprman_write(cprman, data->a2w_reg, + cprman_read(cprman, data->a2w_reg) | + A2W_PLL_CHANNEL_DISABLE); spin_unlock(&cprman->regs_lock); } |