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author | Hauke Mehrtens <hauke@hauke-m.de> | 2013-08-24 00:32:33 +0200 |
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committer | John W. Linville <linville@tuxdriver.com> | 2013-08-26 14:09:03 -0400 |
commit | 521deea64088bc885a76bd174241eaa3d3a6876f (patch) | |
tree | a86d49829ec72acb03a15355f3b90420d06db336 /include/linux/bcma | |
parent | 780335acc815802dcee63d75f5589d43c3ccb402 (diff) | |
download | linux-stable-521deea64088bc885a76bd174241eaa3d3a6876f.tar.gz linux-stable-521deea64088bc885a76bd174241eaa3d3a6876f.tar.bz2 linux-stable-521deea64088bc885a76bd174241eaa3d3a6876f.zip |
bcma: add bcma_core_pci_power_save()
This enables or disables power saving on the PCIe bus when the wifi is
in operation or not.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'include/linux/bcma')
-rw-r--r-- | include/linux/bcma/bcma_driver_pci.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/include/linux/bcma/bcma_driver_pci.h b/include/linux/bcma/bcma_driver_pci.h index 0234955aa9c7..d66033f418c9 100644 --- a/include/linux/bcma/bcma_driver_pci.h +++ b/include/linux/bcma/bcma_driver_pci.h @@ -181,6 +181,26 @@ struct pci_dev; #define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8 +#define BCMA_CORE_PCI_ + +/* MDIO devices (SERDES modules) */ +#define BCMA_CORE_PCI_MDIO_IEEE0 0x000 +#define BCMA_CORE_PCI_MDIO_IEEE1 0x001 +#define BCMA_CORE_PCI_MDIO_BLK0 0x800 +#define BCMA_CORE_PCI_MDIO_BLK1 0x801 +#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16 +#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17 +#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18 +#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19 +#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A +#define BCMA_CORE_PCI_MDIO_BLK2 0x802 +#define BCMA_CORE_PCI_MDIO_BLK3 0x803 +#define BCMA_CORE_PCI_MDIO_BLK4 0x804 +#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */ +#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820 +#define BCMA_CORE_PCI_MDIO_SERDESID 0x831 +#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840 + /* PCIE Root Capability Register bits (Host mode only) */ #define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001 |