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author | Olof Johansson <olof@lixom.net> | 2013-06-07 17:01:42 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2013-06-07 18:21:51 -0700 |
commit | e56c60c374bbcd343ed286c713116056bf3d6d36 (patch) | |
tree | 287370ef948fbd7b9dc45c54e7ed7d384258dd26 /include/linux/clk | |
parent | f49024926236068bc3fe6848aaf87b914049013a (diff) | |
parent | 97c4e87d45498fb4d18c995721bba72345a7d257 (diff) | |
download | linux-stable-e56c60c374bbcd343ed286c713116056bf3d6d36.tar.gz linux-stable-e56c60c374bbcd343ed286c713116056bf3d6d36.tar.bz2 linux-stable-e56c60c374bbcd343ed286c713116056bf3d6d36.zip |
Merge tag 'zynq-clk-for-3.11' of git://git.xilinx.com/linux-xlnx into next/soc
From Michal Simek:
arm: Xilinx Zynq clock changes for v3.11
Change Xilinx Zynq DT clock description which reflects logical abstraction
of Zynq's clock tree.
- Refactor PLL driver
- Use new clock controller driver
- Change timer and uart drivers
* tag 'zynq-clk-for-3.11' of git://git.xilinx.com/linux-xlnx:
clk: zynq: Remove deprecated clock code
arm: zynq: Migrate platform to clock controller
clk: zynq: Add clock controller driver
clk: zynq: Factor out PLL driver
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'include/linux/clk')
-rw-r--r-- | include/linux/clk/zynq.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/include/linux/clk/zynq.h b/include/linux/clk/zynq.h index 56be7cd9aa8b..e062d317ccce 100644 --- a/include/linux/clk/zynq.h +++ b/include/linux/clk/zynq.h @@ -1,4 +1,5 @@ /* + * Copyright (C) 2013 Xilinx Inc. * Copyright (C) 2012 National Instruments * * This program is free software; you can redistribute it and/or modify @@ -19,6 +20,11 @@ #ifndef __LINUX_CLK_ZYNQ_H_ #define __LINUX_CLK_ZYNQ_H_ -void __init xilinx_zynq_clocks_init(void __iomem *slcr); +#include <linux/spinlock.h> +void zynq_clock_init(void __iomem *slcr); + +struct clk *clk_register_zynq_pll(const char *name, const char *parent, + void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index, + spinlock_t *lock); #endif |