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author | Shiraz Hashim <shiraz.hashim@st.com> | 2012-10-27 15:21:36 +0530 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2012-11-11 19:06:00 +0100 |
commit | f23f1516b6757c326cc638bed8c402c77e2a596e (patch) | |
tree | d1d17f111e57038c7ef6df43e79bb969c5844cd2 /include/linux/gpio.h | |
parent | 7e10ee68f8ccc62e0934ff02f39ce541f3879844 (diff) | |
download | linux-stable-f23f1516b6757c326cc638bed8c402c77e2a596e.tar.gz linux-stable-f23f1516b6757c326cc638bed8c402c77e2a596e.tar.bz2 linux-stable-f23f1516b6757c326cc638bed8c402c77e2a596e.zip |
gpiolib: provide provision to register pin ranges
pinctrl subsystem needs gpio chip base to prepare set of gpio
pin ranges, which a given pinctrl driver can handle. This is
important to handle pinctrl gpio request calls in order to
program a given pin properly for gpio operation.
As gpio base is allocated dynamically during gpiochip
registration, presently there exists no clean way to pass this
information to the pinctrl subsystem.
After few discussions from [1], it was concluded that may be
gpio controller reporting the pin range it supports, is a
better way than pinctrl subsystem directly registering it.
[1] http://comments.gmane.org/gmane.linux.ports.arm.kernel/184816
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
[Edited documentation a bit]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/linux/gpio.h')
-rw-r--r-- | include/linux/gpio.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/gpio.h b/include/linux/gpio.h index 2e31e8b3a190..a28445992b7f 100644 --- a/include/linux/gpio.h +++ b/include/linux/gpio.h @@ -231,6 +231,9 @@ static inline int irq_to_gpio(unsigned irq) return -EINVAL; } +void gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, + unsigned int pin_base, unsigned int npins); +void gpiochip_remove_pin_ranges(struct gpio_chip *chip); #endif #endif /* __LINUX_GPIO_H */ |