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author | Jack Morgenstein <jackm@dev.mellanox.co.il> | 2014-03-12 12:00:37 +0200 |
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committer | David S. Miller <davem@davemloft.net> | 2014-03-12 15:57:12 -0400 |
commit | 6ee51a4e866bbb0921180b457ed16cd172859346 (patch) | |
tree | c207c933969c0a492cc9806dec1e0c77dc0f4cf0 /include/linux/mlx4 | |
parent | 36f6fdb74997c3f456f1c6a9803c009c49a30053 (diff) | |
download | linux-stable-6ee51a4e866bbb0921180b457ed16cd172859346.tar.gz linux-stable-6ee51a4e866bbb0921180b457ed16cd172859346.tar.bz2 linux-stable-6ee51a4e866bbb0921180b457ed16cd172859346.zip |
mlx4: Adjust QP1 multiplexing for RoCE/SRIOV
This requires the following modifications:
1. Fix build_mlx4_header to properly fill in the ETH fields
2. Adjust mux and demux QP1 flow to support RoCE.
This commit still assumes only one GID per slave for RoCE.
The commit enabling multiple GIDs is a subsequent commit, and
is done separately because of its complexity.
Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il>
Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/mlx4')
-rw-r--r-- | include/linux/mlx4/device.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index 5edd2c68274d..fbe6cda00ba7 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h @@ -48,6 +48,8 @@ #define MSIX_LEGACY_SZ 4 #define MIN_MSIX_P_PORT 5 +#define MLX4_ROCE_MAX_GIDS 128 + enum { MLX4_FLAG_MSI_X = 1 << 0, MLX4_FLAG_OLD_PORT_CMDS = 1 << 1, @@ -1182,6 +1184,8 @@ int set_and_calc_slave_port_state(struct mlx4_dev *dev, int slave, u8 port, int void mlx4_put_slave_node_guid(struct mlx4_dev *dev, int slave, __be64 guid); __be64 mlx4_get_slave_node_guid(struct mlx4_dev *dev, int slave); +int mlx4_get_slave_from_roce_gid(struct mlx4_dev *dev, int port, u8 *gid, int *slave_id); +int mlx4_get_roce_gid_from_slave(struct mlx4_dev *dev, int port, int slave_id, u8 *gid); int mlx4_FLOW_STEERING_IB_UC_QP_RANGE(struct mlx4_dev *dev, u32 min_range_qpn, u32 max_range_qpn); |