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author | Paul Mundt <lethal@linux-sh.org> | 2010-10-05 04:47:03 +0900 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2010-10-05 04:47:03 +0900 |
commit | c1e30ad98fe210688edca872686db4a715c2fb23 (patch) | |
tree | 1ff151ccc9658d7a2d89da9cfc6a2d6817913a79 /include/linux/sh_intc.h | |
parent | 44629f57accccbb8e6d443246fe6f51b42f7f781 (diff) | |
download | linux-stable-c1e30ad98fe210688edca872686db4a715c2fb23.tar.gz linux-stable-c1e30ad98fe210688edca872686db4a715c2fb23.tar.bz2 linux-stable-c1e30ad98fe210688edca872686db4a715c2fb23.zip |
sh: intc: Support virtual mappings for IRQ subgroups.
Many interrupts that share a single mask source but are on different
hardware vectors will have an associated register tied to an INTEVT that
denotes the precise cause for the interrupt exception being triggered.
This introduces the concept of IRQ subgroups in the intc core, where
a virtual IRQ map is constructed for each of the pre-defined cause bits,
and a higher level chained handler takes control of the parent INTEVT.
This enables CPUs with heavily muxed IRQ vectors (especially across
disjoint blocks) to break things out in to a series of managed chained
handlers while being able to dynamically lookup and adopt the IRQs
created for them.
This is largely an opt-in interface, requiring CPUs to manually submit
IRQs for subgroup splitting, in addition to providing identifiers in
their enum maps that can be used for lazy lookup via the radix tree.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/linux/sh_intc.h')
-rw-r--r-- | include/linux/sh_intc.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h index d40fd77fa75c..04134a6c7b52 100644 --- a/include/linux/sh_intc.h +++ b/include/linux/sh_intc.h @@ -20,6 +20,12 @@ struct intc_group { #define INTC_GROUP(enum_id, ids...) { enum_id, { ids } } +struct intc_subgroup { + unsigned long reg, reg_width; + intc_enum parent_id; + intc_enum enum_ids[32]; +}; + struct intc_mask_reg { unsigned long set_reg, clr_reg, reg_width; intc_enum enum_ids[32]; @@ -69,9 +75,12 @@ struct intc_hw_desc { unsigned int nr_sense_regs; struct intc_mask_reg *ack_regs; unsigned int nr_ack_regs; + struct intc_subgroup *subgroups; + unsigned int nr_subgroups; }; -#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) +#define _INTC_ARRAY(a) a, a == NULL ? 0 : sizeof(a)/sizeof(*a) + #define INTC_HW_DESC(vectors, groups, mask_regs, \ prio_regs, sense_regs, ack_regs) \ { \ @@ -109,6 +118,7 @@ int __init register_intc_controller(struct intc_desc *desc); void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs); int intc_set_priority(unsigned int irq, unsigned int prio); unsigned int intc_irq_lookup(const char *chipname, intc_enum enum_id); +void intc_finalize(void); #ifdef CONFIG_INTC_USERIMASK int register_intc_userimask(unsigned long addr); |