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author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-02-02 16:37:40 +0000 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2017-02-11 17:50:43 +0800 |
commit | b5e0b032b6c31c052ee0132ee70b155c22cf7b28 (patch) | |
tree | cea293543e163a375ca0275278cca5f63b8077d2 /net/atm | |
parent | ec38a9376163f9f7cb671e49b7667129c7bb8f8b (diff) | |
download | linux-stable-b5e0b032b6c31c052ee0132ee70b155c22cf7b28.tar.gz linux-stable-b5e0b032b6c31c052ee0132ee70b155c22cf7b28.tar.bz2 linux-stable-b5e0b032b6c31c052ee0132ee70b155c22cf7b28.zip |
crypto: aes - add generic time invariant AES cipher
Lookup table based AES is sensitive to timing attacks, which is due to
the fact that such table lookups are data dependent, and the fact that
8 KB worth of tables covers a significant number of cachelines on any
architecture, resulting in an exploitable correlation between the key
and the processing time for known plaintexts.
For network facing algorithms such as CTR, CCM or GCM, this presents a
security risk, which is why arch specific AES ports are typically time
invariant, either through the use of special instructions, or by using
SIMD algorithms that don't rely on table lookups.
For generic code, this is difficult to achieve without losing too much
performance, but we can improve the situation significantly by switching
to an implementation that only needs 256 bytes of table data (the actual
S-box itself), which can be prefetched at the start of each block to
eliminate data dependent latencies.
This code encrypts at ~25 cycles per byte on ARM Cortex-A57 (while the
ordinary generic AES driver manages 18 cycles per byte on this
hardware). Decryption is substantially slower.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'net/atm')
0 files changed, 0 insertions, 0 deletions