summaryrefslogtreecommitdiffstats
path: root/arch/mips/include
Commit message (Expand)AuthorAgeFilesLines
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2015-02-2147-408/+1166
|\
| * MIPS: OCTEON: More OCTEONIII supportChandrakala Chavva2015-02-202-0/+309
| * MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.Chad Reese2015-02-201-20/+0
| * MIPS: OCTEON: Core-15169 Workaround and general CVMSEG cleanup.David Daney2015-02-201-3/+16
| * MIPS: OCTEON: Update octeon-model.h code for new SoCs.David Daney2015-02-201-22/+85
| * MIPS: OCTEON: Implement DCache errata workaround for all CN6XXXDavid Daney2015-02-201-0/+3
| * MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.hDavid Daney2015-02-201-30/+105
| * MIPS: OCTEON: Implement the core-16057 workaroundDavid Daney2015-02-201-0/+22
| * MIPS: OCTEON: Save and restore CP2 SHA3 stateDavid Daney2015-02-201-0/+2
| * MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUsDavid Daney2015-02-202-2/+15
| * MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.hDavid Daney2015-02-201-6/+0
| * MIPS: ip22-gio: Remove legacy suspend/resume supportLars-Peter Clausen2015-02-201-2/+0
| * mips: pci: Add ifdef around pci_proc_domainZubair Lutfullah Kakakhel2015-02-201-0/+2
| * MIPS: Add set/clear CP0 macros for PageGrain registerSteven J. Hill2015-02-201-0/+1
| * MIPS: Usage and cosmetic cleanups of page table bits.Steven J. Hill2015-02-192-62/+38
| * Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/...Ralf Baechle2015-02-1929-180/+497
| |\
| | * MIPS: kernel: elf: Improve the overall ABI and FPU mode checksMarkos Chandras2015-02-171-4/+6
| | * MIPS: asm: fpu: Allow 64-bit FPU on MIPS32 R6Markos Chandras2015-02-171-1/+2
| | * MIPS: Handle MIPS IV, V and R2 FPU instructions on MIPS R6 as wellMarkos Chandras2015-02-171-1/+2
| | * MIPS: Make use of the ERETNC instruction on MIPS R6Markos Chandras2015-02-172-4/+7
| | * MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6Leonid Yegoshin2015-02-172-3/+96
| | * MIPS: asm: mipsregs: Add support for the LLADDR registerMarkos Chandras2015-02-171-0/+2
| | * MIPS: Add LLB bit and related feature for the Config 5 CP0 registerMarkos Chandras2015-02-173-0/+5
| | * MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructionsMarkos Chandras2015-02-171-1/+1
| | * MIPS: Emulate the new MIPS R6 BEQZC and JIC instructionsMarkos Chandras2015-02-171-1/+1
| | * MIPS: Emulate the new MIPS R6 BALC instructionMarkos Chandras2015-02-171-1/+1
| | * MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructionsMarkos Chandras2015-02-171-1/+1
| | * MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructionsMarkos Chandras2015-02-171-1/+1
| | * MIPS: Emulate the new MIPS R6 branch compact (BC) instructionMarkos Chandras2015-02-171-1/+1
| | * MIPS: Emulate the BC1{EQ,NE}Z FPU instructionsMarkos Chandras2015-02-171-1/+2
| | * MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6Markos Chandras2015-02-171-0/+3
| | * MIPS: kernel: r4k_switch: Add support for MIPS R6Leonid Yegoshin2015-02-171-5/+7
| | * MIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfoMarkos Chandras2015-02-171-0/+3
| | * MIPS: asm: local: Set the appropriate ISA level for MIPS R6Markos Chandras2015-02-171-2/+3
| | * MIPS: asm: spinlock: Replace "sub" instruction with "addiu"Markos Chandras2015-02-171-5/+2
| | * MIPS: asm: futex: Set the appropriate ISA level for MIPS R6Markos Chandras2015-02-171-4/+4
| | * MIPS: asm: bitops: Update ISA constraints for MIPS R6 supportMarkos Chandras2015-02-171-15/+15
| | * MIPS: asm: atomic: Update ISA constraints for MIPS R6 supportMarkos Chandras2015-02-171-6/+6
| | * MIPS: asm: cmpxchg: Update ISA constraints for MIPS R6 supportMarkos Chandras2015-02-171-5/+5
| | * MIPS: Use the new "ZC" constraint for MIPS R6Markos Chandras2015-02-171-1/+6
| | * MIPS: asm: Rename GCC_OFF12_ASM to GCC_OFF_SMALL_ASMMarkos Chandras2015-02-179-93/+93
| | * MIPS: asm: spram: Add new symbol for MIPS scratch pad storageMarkos Chandras2015-02-171-2/+2
| | * MIPS: asm: r4kcache: Add MIPS R6 cache unroll functionsMarkos Chandras2015-02-171-2/+148
| | * MIPS: asm: irqflags: Add MIPS R6 related definitionsMarkos Chandras2015-02-171-3/+4
| | * MIPS: asm: hazards: Add MIPSR6 definitionsMarkos Chandras2015-02-171-4/+5
| | * MIPS: asm: cpu: Add MIPSR6 ISA definitionsLeonid Yegoshin2015-02-172-6/+20
| | * MIPS: Use generic checksum functions for MIPS R6Markos Chandras2015-02-172-0/+6
| | * MIPS: asm: asmmacro: Replace "add" instructions with "addu"Markos Chandras2015-02-171-2/+2
| | * MIPS: asm: asmmacro: Add MIPS R6 support to the simple EI/DI variantsLeonid Yegoshin2015-02-171-1/+1
| | * MIPS: asm: stackframe: Do not preserve the HI/LO registers on MIPS R6Leonid Yegoshin2015-02-171-4/+4
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-01 12:29:01 +0000