From 347b9bdddbc38cfd46c27b3345e7facf651ecb92 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 25 Jul 2007 10:46:32 +0900 Subject: sh: remove old broken pint code The code in arch/sh/kernel/cpu/irq/pint.c doesn't compile, so let's get rid of it to make space for a future pint implementation on top of intc. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- arch/sh/Kconfig | 3 - arch/sh/kernel/cpu/irq/Makefile | 1 - arch/sh/kernel/cpu/irq/pint.c | 220 ---------------------------------------- arch/sh/mm/Kconfig | 3 - 4 files changed, 227 deletions(-) delete mode 100644 arch/sh/kernel/cpu/irq/pint.c diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index f87f429e0b24..b1063f46e6a2 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -172,9 +172,6 @@ config SPECULATIVE_EXECUTION config CPU_HAS_INTEVT bool -config CPU_HAS_PINT_IRQ - bool - config CPU_HAS_MASKREG_IRQ bool diff --git a/arch/sh/kernel/cpu/irq/Makefile b/arch/sh/kernel/cpu/irq/Makefile index 9ddb446ac930..60bfc05cf354 100644 --- a/arch/sh/kernel/cpu/irq/Makefile +++ b/arch/sh/kernel/cpu/irq/Makefile @@ -4,7 +4,6 @@ obj-y += imask.o obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o -obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o obj-$(CONFIG_CPU_HAS_INTC_IRQ) += intc.o obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o diff --git a/arch/sh/kernel/cpu/irq/pint.c b/arch/sh/kernel/cpu/irq/pint.c deleted file mode 100644 index 67602685df1a..000000000000 --- a/arch/sh/kernel/cpu/irq/pint.c +++ /dev/null @@ -1,220 +0,0 @@ -/* - * arch/sh/kernel/cpu/irq/pint.c - Interrupt handling for PINT-based IRQs. - * - * Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi - * Copyright (C) 2000 Kazumoto Kojima - * Copyright (C) 2003 Takashi Kusuda - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#include -#include -#include - -#include -#include -#include - -#if defined(CONFIG_CPU_SUBTYPE_SH7705) -#define INTC_INTER 0xA4000014UL -#define INTC_IPRD 0xA4000018UL -#define INTC_ICR2 0xA4000012UL - -/* PFC */ -#define PORT_PACR 0xA4000100UL -#define PORT_PBCR 0xA4000102UL -#define PORT_PCCR 0xA4000104UL -#define PORT_PDCR 0xA4000106UL -#define PORT_PECR 0xA4000108UL -#define PORT_PFCR 0xA400010AUL -#define PORT_PGCR 0xA400010CUL -#define PORT_PHCR 0xA400010EUL -#define PORT_PJCR 0xA4000110UL -#define PORT_PKCR 0xA4000112UL -#define PORT_PLCR 0xA4000114UL -#define PORT_PMCR 0xA4000118UL -#define PORT_PNCR 0xA400011AUL -#define PORT_PECR2 0xA4050148UL -#define PORT_PFCR2 0xA405014AUL -#define PORT_PNCR2 0xA405015AUL - -/* I/O port */ -#define PORT_PADR 0xA4000120UL -#define PORT_PBDR 0xA4000122UL -#define PORT_PCDR 0xA4000124UL -#define PORT_PDDR 0xA4000126UL -#define PORT_PEDR 0xA4000128UL -#define PORT_PFDR 0xA400012AUL -#define PORT_PGDR 0xA400012CUL -#define PORT_PHDR 0xA400012EUL -#define PORT_PJDR 0xA4000130UL -#define PORT_PKDR 0xA4000132UL -#define PORT_PLDR 0xA4000134UL -#define PORT_PMDR 0xA4000138UL -#define PORT_PNDR 0xA400013AUL - -#define PINT0_IRQ 40 -#define PINT8_IRQ 41 -#define PINT_IRQ_BASE 86 - -#define PINT0_IPR_ADDR INTC_IPRD -#define PINT0_IPR_POS 3 -#define PINT0_PRIORITY 2 - -#define PINT8_IPR_ADDR INTC_IPRD -#define PINT8_IPR_POS 2 -#define PINT8_PRIORITY 2 - -#endif /* CONFIG_CPU_SUBTYPE_SH7705 */ - -static unsigned char pint_map[256]; -static unsigned long portcr_mask; - -static void enable_pint_irq(unsigned int irq); -static void disable_pint_irq(unsigned int irq); - -/* shutdown is same as "disable" */ -#define shutdown_pint_irq disable_pint_irq - -static void mask_and_ack_pint(unsigned int); -static void end_pint_irq(unsigned int irq); - -static unsigned int startup_pint_irq(unsigned int irq) -{ - enable_pint_irq(irq); - return 0; /* never anything pending */ -} - -static struct hw_interrupt_type pint_irq_type = { - .typename = "PINT-IRQ", - .startup = startup_pint_irq, - .shutdown = shutdown_pint_irq, - .enable = enable_pint_irq, - .disable = disable_pint_irq, - .ack = mask_and_ack_pint, - .end = end_pint_irq -}; - -static void disable_pint_irq(unsigned int irq) -{ - unsigned long val; - - val = ctrl_inw(INTC_INTER); - val &= ~(1 << (irq - PINT_IRQ_BASE)); - ctrl_outw(val, INTC_INTER); /* disable PINTn */ - portcr_mask &= ~(3 << (irq - PINT_IRQ_BASE)*2); -} - -static void enable_pint_irq(unsigned int irq) -{ - unsigned long val; - - val = ctrl_inw(INTC_INTER); - val |= 1 << (irq - PINT_IRQ_BASE); - ctrl_outw(val, INTC_INTER); /* enable PINTn */ - portcr_mask |= 3 << (irq - PINT_IRQ_BASE)*2; -} - -static void mask_and_ack_pint(unsigned int irq) -{ - disable_pint_irq(irq); -} - -static void end_pint_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - enable_pint_irq(irq); -} - -void make_pint_irq(unsigned int irq) -{ - disable_irq_nosync(irq); - irq_desc[irq].chip = &pint_irq_type; - disable_pint_irq(irq); -} - -static struct ipr_data pint_ipr_map[] = { - { PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY }, - { PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY }, -}; - -void __init init_IRQ_pint(void) -{ - int i; - - make_ipr_irq(pint_ipr_map, ARRAY_SIZE(pint_ipr_map)); - - enable_irq(PINT0_IRQ); - enable_irq(PINT8_IRQ); - - for(i = 0; i < 16; i++) - make_pint_irq(PINT_IRQ_BASE + i); - - for(i = 0; i < 256; i++) { - if (i & 1) - pint_map[i] = 0; - else if (i & 2) - pint_map[i] = 1; - else if (i & 4) - pint_map[i] = 2; - else if (i & 8) - pint_map[i] = 3; - else if (i & 0x10) - pint_map[i] = 4; - else if (i & 0x20) - pint_map[i] = 5; - else if (i & 0x40) - pint_map[i] = 6; - else if (i & 0x80) - pint_map[i] = 7; - } -} - -int ipr_irq_demux(int irq) -{ - unsigned long creg, dreg, d, sav; - - if (irq == PINT0_IRQ) { -#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7707) - creg = PORT_PACR; - dreg = PORT_PADR; -#else - creg = PORT_PCCR; - dreg = PORT_PCDR; -#endif - sav = ctrl_inw(creg); - ctrl_outw(sav | portcr_mask, creg); - d = (~ctrl_inb(dreg) ^ ctrl_inw(INTC_ICR2)) & - ctrl_inw(INTC_INTER) & 0xff; - ctrl_outw(sav, creg); - - if (d == 0) - return irq; - - return PINT_IRQ_BASE + pint_map[d]; - } else if (irq == PINT8_IRQ) { -#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7707) - creg = PORT_PBCR; - dreg = PORT_PBDR; -#else - creg = PORT_PFCR; - dreg = PORT_PFDR; -#endif - sav = ctrl_inw(creg); - ctrl_outw(sav | (portcr_mask >> 16), creg); - d = (~ctrl_inb(dreg) ^ (ctrl_inw(INTC_ICR2) >> 8)) & - (ctrl_inw(INTC_INTER) >> 8) & 0xff; - ctrl_outw(sav, creg); - - if (d == 0) - return irq; - - return PINT_IRQ_BASE + 8 + pint_map[d]; - } - - return irq; -} - diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index 70da1c8d407e..0fc1e8ea779e 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig @@ -70,7 +70,6 @@ config CPU_SUBTYPE_SH7705 bool "Support SH7705 processor" select CPU_SH3 select CPU_HAS_IPR_IRQ - select CPU_HAS_PINT_IRQ config CPU_SUBTYPE_SH7706 bool "Support SH7706 processor" @@ -82,7 +81,6 @@ config CPU_SUBTYPE_SH7706 config CPU_SUBTYPE_SH7707 bool "Support SH7707 processor" select CPU_SH3 - select CPU_HAS_PINT_IRQ help Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. @@ -97,7 +95,6 @@ config CPU_SUBTYPE_SH7709 bool "Support SH7709 processor" select CPU_SH3 select CPU_HAS_IPR_IRQ - select CPU_HAS_PINT_IRQ help Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. -- cgit v1.2.3