From 8e6302ebedd30a3990c6b9b9a9a51252abcd5d87 Mon Sep 17 00:00:00 2001 From: Dillon Varone Date: Thu, 24 Aug 2023 12:19:21 -0400 Subject: drm/amd/display: add dp dto programming function to dccg [WHY&HOW] Add support for programming dp dto via dccg. Reviewed-by: Jun Lei Acked-by: Stylon Wang Signed-off-by: Dillon Varone Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 1 + drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c index ed8936405dfa..75cf4ab8ae3c 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c @@ -34,6 +34,7 @@ #include "dce_clock_source.h" #include "clk_mgr.h" +#include "dccg.h" #include "reg_helper.h" diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h index 3e2f0f64c98c..65bb7cd05385 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h @@ -56,6 +56,13 @@ enum dentist_dispclk_change_mode { DISPCLK_CHANGE_MODE_RAMPING, }; +struct dp_dto_params { + int otg_inst; + enum signal_type signal; + long long pixclk_hz; + long long refclk_hz; +}; + enum pixel_rate_div { PIXEL_RATE_DIV_BY_1 = 0, PIXEL_RATE_DIV_BY_2 = 1, @@ -182,6 +189,9 @@ struct dccg_funcs { struct dccg *dccg, uint32_t stream_enc_inst, uint32_t link_enc_inst); + void (*set_dp_dto)( + struct dccg *dccg, + const struct dp_dto_params *params); }; #endif //__DAL_DCCG_H__ -- cgit v1.2.3