From 9b780c845fb60e1c0f5ec192fee835c72142173b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Draszik?= Date: Tue, 23 Apr 2024 21:19:46 +0100 Subject: usb: dwc3: exynos: add support for Google Tensor gs101 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Exynos-based Google Tensor gs101 SoC has a DWC3 compatible USB controller and can reuse the existing Exynos glue. Add the google,gs101-dwusb3 compatible and associated driver data. Four clocks are required for USB for this SoC: * bus clock * suspend clock * Link interface AXI clock * Link interface APB clock Signed-off-by: André Draszik Reviewed-by: Peter Griffin Acked-by: Thinh Nguyen Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240423-usb-dwc3-gs101-v1-2-2f331f88203f@linaro.org Signed-off-by: Greg Kroah-Hartman --- drivers/usb/dwc3/dwc3-exynos.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c index 3427522a7c6a..9a6e988d165a 100644 --- a/drivers/usb/dwc3/dwc3-exynos.c +++ b/drivers/usb/dwc3/dwc3-exynos.c @@ -169,6 +169,12 @@ static const struct dwc3_exynos_driverdata exynos850_drvdata = { .suspend_clk_idx = -1, }; +static const struct dwc3_exynos_driverdata gs101_drvdata = { + .clk_names = { "bus_early", "susp_clk", "link_aclk", "link_pclk" }, + .num_clks = 4, + .suspend_clk_idx = 1, +}; + static const struct of_device_id exynos_dwc3_match[] = { { .compatible = "samsung,exynos5250-dwusb3", @@ -182,6 +188,9 @@ static const struct of_device_id exynos_dwc3_match[] = { }, { .compatible = "samsung,exynos850-dwusb3", .data = &exynos850_drvdata, + }, { + .compatible = "google,gs101-dwusb3", + .data = &gs101_drvdata, }, { } }; -- cgit v1.2.3