From f35cd3fa77293c2cd03e94b6a6151e1a7d9309cf Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Mon, 2 Jan 2023 12:29:15 +0100 Subject: firmware/sysfb: Fix EFI/VESA format selection Select color format for EFI/VESA firmware scanout buffer from the number of bits per pixel and the position of the individual color components. Fixes the selected format for the buffer in several odd cases. For example, XRGB1555 has been reported as ARGB1555 because of the different use of depth and transparency in VESA and Linux. Bits-per-pixel is always the pixel's raw number of bits; including alpha and filler bits. It is preferred over color depth, which has a different meaning among various components and standards. Also do not compare reserved bits and transparency bits to each other. These values have different meanings, as reserved bits include filler bits while transparency does not. Signed-off-by: Thomas Zimmermann Reviewed-by: Javier Martinez Canillas Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-2-tzimmermann@suse.de --- drivers/firmware/sysfb_simplefb.c | 43 +++++++++++++++++++++++++++++++++------ 1 file changed, 37 insertions(+), 6 deletions(-) diff --git a/drivers/firmware/sysfb_simplefb.c b/drivers/firmware/sysfb_simplefb.c index a353e27f83f5..ce9c007ed66f 100644 --- a/drivers/firmware/sysfb_simplefb.c +++ b/drivers/firmware/sysfb_simplefb.c @@ -27,25 +27,56 @@ static const struct simplefb_format formats[] = SIMPLEFB_FORMATS; __init bool sysfb_parse_mode(const struct screen_info *si, struct simplefb_platform_data *mode) { - const struct simplefb_format *f; __u8 type; + u32 bits_per_pixel; unsigned int i; type = si->orig_video_isVGA; if (type != VIDEO_TYPE_VLFB && type != VIDEO_TYPE_EFI) return false; + /* + * The meaning of depth and bpp for direct-color formats is + * inconsistent: + * + * - DRM format info specifies depth as the number of color + * bits; including alpha, but not including filler bits. + * - Linux' EFI platform code computes lfb_depth from the + * individual color channels, including the reserved bits. + * - VBE 1.1 defines lfb_depth for XRGB1555 as 16, but later + * versions use 15. + * - On the kernel command line, 'bpp' of 32 is usually + * XRGB8888 including the filler bits, but 15 is XRGB1555 + * not including the filler bit. + * + * It's not easily possible to fix this in struct screen_info, + * as this could break UAPI. The best solution is to compute + * bits_per_pixel here and ignore lfb_depth. In the loop below, + * ignore simplefb formats with alpha bits, as EFI and VESA + * don't specify alpha channels. + */ + if (si->lfb_depth > 8) { + bits_per_pixel = max(max3(si->red_size + si->red_pos, + si->green_size + si->green_pos, + si->blue_size + si->blue_pos), + si->rsvd_size + si->rsvd_pos); + } else { + bits_per_pixel = si->lfb_depth; + } + for (i = 0; i < ARRAY_SIZE(formats); ++i) { - f = &formats[i]; - if (si->lfb_depth == f->bits_per_pixel && + const struct simplefb_format *f = &formats[i]; + + if (f->transp.length) + continue; /* transparent formats are unsupported by VESA/EFI */ + + if (bits_per_pixel == f->bits_per_pixel && si->red_size == f->red.length && si->red_pos == f->red.offset && si->green_size == f->green.length && si->green_pos == f->green.offset && si->blue_size == f->blue.length && - si->blue_pos == f->blue.offset && - si->rsvd_size == f->transp.length && - si->rsvd_pos == f->transp.offset) { + si->blue_pos == f->blue.offset) { mode->format = f->name; mode->width = si->lfb_width; mode->height = si->lfb_height; -- cgit v1.2.3 From a5b1a681dcac2eb75129e5e1bc2530dbd6febc44 Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Mon, 2 Jan 2023 12:29:16 +0100 Subject: drm/format-helper: Comment on RGB888 byte order MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit RGB888 is different than the other formats as most of its pixels are unaligned and therefore helper functions do not use endianness conversion helpers. Comment on this in the source code. Signed-off-by: Thomas Zimmermann Reviewed-by: Maíra Canal Reviewed-by: José Expósito Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-3-tzimmermann@suse.de --- drivers/gpu/drm/drm_format_helper.c | 1 + drivers/gpu/drm/tests/drm_format_helper_test.c | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/drm_format_helper.c b/drivers/gpu/drm/drm_format_helper.c index 74ff33c2ddaa..b98bd7c5caee 100644 --- a/drivers/gpu/drm/drm_format_helper.c +++ b/drivers/gpu/drm/drm_format_helper.c @@ -404,6 +404,7 @@ static void drm_fb_xrgb8888_to_rgb888_line(void *dbuf, const void *sbuf, unsigne for (x = 0; x < pixels; x++) { pix = le32_to_cpu(sbuf32[x]); + /* write blue-green-red to output in little endianness */ *dbuf8++ = (pix & 0x000000FF) >> 0; *dbuf8++ = (pix & 0x0000FF00) >> 8; *dbuf8++ = (pix & 0x00FF0000) >> 16; diff --git a/drivers/gpu/drm/tests/drm_format_helper_test.c b/drivers/gpu/drm/tests/drm_format_helper_test.c index 2191e57f2297..cd1d7da3483c 100644 --- a/drivers/gpu/drm/tests/drm_format_helper_test.c +++ b/drivers/gpu/drm/tests/drm_format_helper_test.c @@ -407,6 +407,10 @@ static void drm_test_fb_xrgb8888_to_rgb888(struct kunit *test) KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xrgb8888); iosys_map_set_vaddr(&src, xrgb8888); + /* + * RGB888 expected results are already in little-endian + * order, so there's no need to convert the test output. + */ drm_fb_xrgb8888_to_rgb888(&dst, &result->dst_pitch, &src, &fb, ¶ms->clip); KUNIT_EXPECT_EQ(test, memcmp(buf, result->expected, dst_size), 0); } -- cgit v1.2.3 From 58f5d9830da0d4f257cc39244ba982cf90e3199c Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Mon, 2 Jan 2023 12:29:17 +0100 Subject: drm/format-helper: Fix test-input format conversion MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Convert test input for format helpers from host byte order to little-endian order. The current code does it the other way around, but there's no effective difference to the result. Signed-off-by: Thomas Zimmermann Reviewed-by: Maíra Canal Reviewed-by: José Expósito Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-4-tzimmermann@suse.de --- drivers/gpu/drm/tests/drm_format_helper_test.c | 35 ++++++++++++++++++-------- 1 file changed, 25 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/tests/drm_format_helper_test.c b/drivers/gpu/drm/tests/drm_format_helper_test.c index cd1d7da3483c..e7c49e6d3f6d 100644 --- a/drivers/gpu/drm/tests/drm_format_helper_test.c +++ b/drivers/gpu/drm/tests/drm_format_helper_test.c @@ -279,6 +279,21 @@ static u32 *le32buf_to_cpu(struct kunit *test, const u32 *buf, size_t buf_size) return dst; } +static __le32 *cpubuf_to_le32(struct kunit *test, const u32 *buf, size_t buf_size) +{ + __le32 *dst = NULL; + int n; + + dst = kunit_kzalloc(test, sizeof(*dst) * buf_size, GFP_KERNEL); + if (!dst) + return NULL; + + for (n = 0; n < buf_size; n++) + dst[n] = cpu_to_le32(buf[n]); + + return dst; +} + static void convert_xrgb8888_case_desc(struct convert_xrgb8888_case *t, char *desc) { @@ -294,7 +309,7 @@ static void drm_test_fb_xrgb8888_to_gray8(struct kunit *test) const struct convert_to_gray8_result *result = ¶ms->gray8_result; size_t dst_size; __u8 *buf = NULL; - __u32 *xrgb8888 = NULL; + __le32 *xrgb8888 = NULL; struct iosys_map dst, src; struct drm_framebuffer fb = { @@ -310,7 +325,7 @@ static void drm_test_fb_xrgb8888_to_gray8(struct kunit *test) KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf); iosys_map_set_vaddr(&dst, buf); - xrgb8888 = le32buf_to_cpu(test, params->xrgb8888, TEST_BUF_SIZE); + xrgb8888 = cpubuf_to_le32(test, params->xrgb8888, TEST_BUF_SIZE); KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xrgb8888); iosys_map_set_vaddr(&src, xrgb8888); @@ -324,7 +339,7 @@ static void drm_test_fb_xrgb8888_to_rgb332(struct kunit *test) const struct convert_to_rgb332_result *result = ¶ms->rgb332_result; size_t dst_size; __u8 *buf = NULL; - __u32 *xrgb8888 = NULL; + __le32 *xrgb8888 = NULL; struct iosys_map dst, src; struct drm_framebuffer fb = { @@ -340,7 +355,7 @@ static void drm_test_fb_xrgb8888_to_rgb332(struct kunit *test) KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf); iosys_map_set_vaddr(&dst, buf); - xrgb8888 = le32buf_to_cpu(test, params->xrgb8888, TEST_BUF_SIZE); + xrgb8888 = cpubuf_to_le32(test, params->xrgb8888, TEST_BUF_SIZE); KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xrgb8888); iosys_map_set_vaddr(&src, xrgb8888); @@ -354,7 +369,7 @@ static void drm_test_fb_xrgb8888_to_rgb565(struct kunit *test) const struct convert_to_rgb565_result *result = ¶ms->rgb565_result; size_t dst_size; __u16 *buf = NULL; - __u32 *xrgb8888 = NULL; + __le32 *xrgb8888 = NULL; struct iosys_map dst, src; struct drm_framebuffer fb = { @@ -370,7 +385,7 @@ static void drm_test_fb_xrgb8888_to_rgb565(struct kunit *test) KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf); iosys_map_set_vaddr(&dst, buf); - xrgb8888 = le32buf_to_cpu(test, params->xrgb8888, TEST_BUF_SIZE); + xrgb8888 = cpubuf_to_le32(test, params->xrgb8888, TEST_BUF_SIZE); KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xrgb8888); iosys_map_set_vaddr(&src, xrgb8888); @@ -387,7 +402,7 @@ static void drm_test_fb_xrgb8888_to_rgb888(struct kunit *test) const struct convert_to_rgb888_result *result = ¶ms->rgb888_result; size_t dst_size; __u8 *buf = NULL; - __u32 *xrgb8888 = NULL; + __le32 *xrgb8888 = NULL; struct iosys_map dst, src; struct drm_framebuffer fb = { @@ -403,7 +418,7 @@ static void drm_test_fb_xrgb8888_to_rgb888(struct kunit *test) KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf); iosys_map_set_vaddr(&dst, buf); - xrgb8888 = le32buf_to_cpu(test, params->xrgb8888, TEST_BUF_SIZE); + xrgb8888 = cpubuf_to_le32(test, params->xrgb8888, TEST_BUF_SIZE); KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xrgb8888); iosys_map_set_vaddr(&src, xrgb8888); @@ -421,7 +436,7 @@ static void drm_test_fb_xrgb8888_to_xrgb2101010(struct kunit *test) const struct convert_to_xrgb2101010_result *result = ¶ms->xrgb2101010_result; size_t dst_size; __u32 *buf = NULL; - __u32 *xrgb8888 = NULL; + __le32 *xrgb8888 = NULL; struct iosys_map dst, src; struct drm_framebuffer fb = { @@ -437,7 +452,7 @@ static void drm_test_fb_xrgb8888_to_xrgb2101010(struct kunit *test) KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf); iosys_map_set_vaddr(&dst, buf); - xrgb8888 = le32buf_to_cpu(test, params->xrgb8888, TEST_BUF_SIZE); + xrgb8888 = cpubuf_to_le32(test, params->xrgb8888, TEST_BUF_SIZE); KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xrgb8888); iosys_map_set_vaddr(&src, xrgb8888); -- cgit v1.2.3 From f21d62c9ce3db2c74875a15bec6afbae93ee43cc Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Mon, 2 Jan 2023 12:29:18 +0100 Subject: drm/format-helper: Store RGB565 in little-endian order MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix to-RGB565 conversion helpers to store the result in little- endian byte order. Update test cases as well. Signed-off-by: Thomas Zimmermann Reviewed-by: Maíra Canal Reviewed-by: José Expósito Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-5-tzimmermann@suse.de --- drivers/gpu/drm/drm_format_helper.c | 9 +++++---- drivers/gpu/drm/tests/drm_format_helper_test.c | 20 +++++++++++++++++++- 2 files changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/drm_format_helper.c b/drivers/gpu/drm/drm_format_helper.c index b98bd7c5caee..f3f3b3809a3e 100644 --- a/drivers/gpu/drm/drm_format_helper.c +++ b/drivers/gpu/drm/drm_format_helper.c @@ -322,7 +322,7 @@ EXPORT_SYMBOL(drm_fb_xrgb8888_to_rgb332); static void drm_fb_xrgb8888_to_rgb565_line(void *dbuf, const void *sbuf, unsigned int pixels) { - u16 *dbuf16 = dbuf; + __le16 *dbuf16 = dbuf; const __le32 *sbuf32 = sbuf; unsigned int x; u16 val16; @@ -333,14 +333,15 @@ static void drm_fb_xrgb8888_to_rgb565_line(void *dbuf, const void *sbuf, unsigne val16 = ((pix & 0x00F80000) >> 8) | ((pix & 0x0000FC00) >> 5) | ((pix & 0x000000F8) >> 3); - dbuf16[x] = val16; + dbuf16[x] = cpu_to_le16(val16); } } +/* TODO: implement this helper as conversion to RGB565|BIG_ENDIAN */ static void drm_fb_xrgb8888_to_rgb565_swab_line(void *dbuf, const void *sbuf, unsigned int pixels) { - u16 *dbuf16 = dbuf; + __le16 *dbuf16 = dbuf; const __le32 *sbuf32 = sbuf; unsigned int x; u16 val16; @@ -351,7 +352,7 @@ static void drm_fb_xrgb8888_to_rgb565_swab_line(void *dbuf, const void *sbuf, val16 = ((pix & 0x00F80000) >> 8) | ((pix & 0x0000FC00) >> 5) | ((pix & 0x000000F8) >> 3); - dbuf16[x] = swab16(val16); + dbuf16[x] = cpu_to_le16(swab16(val16)); } } diff --git a/drivers/gpu/drm/tests/drm_format_helper_test.c b/drivers/gpu/drm/tests/drm_format_helper_test.c index e7c49e6d3f6d..04fe373c9d97 100644 --- a/drivers/gpu/drm/tests/drm_format_helper_test.c +++ b/drivers/gpu/drm/tests/drm_format_helper_test.c @@ -264,6 +264,21 @@ static size_t conversion_buf_size(u32 dst_format, unsigned int dst_pitch, return dst_pitch * drm_rect_height(clip); } +static u16 *le16buf_to_cpu(struct kunit *test, const __le16 *buf, size_t buf_size) +{ + u16 *dst = NULL; + int n; + + dst = kunit_kzalloc(test, sizeof(*dst) * buf_size, GFP_KERNEL); + if (!dst) + return NULL; + + for (n = 0; n < buf_size; n++) + dst[n] = le16_to_cpu(buf[n]); + + return dst; +} + static u32 *le32buf_to_cpu(struct kunit *test, const u32 *buf, size_t buf_size) { u32 *dst = NULL; @@ -368,7 +383,7 @@ static void drm_test_fb_xrgb8888_to_rgb565(struct kunit *test) const struct convert_xrgb8888_case *params = test->param_value; const struct convert_to_rgb565_result *result = ¶ms->rgb565_result; size_t dst_size; - __u16 *buf = NULL; + u16 *buf = NULL; __le32 *xrgb8888 = NULL; struct iosys_map dst, src; @@ -390,9 +405,12 @@ static void drm_test_fb_xrgb8888_to_rgb565(struct kunit *test) iosys_map_set_vaddr(&src, xrgb8888); drm_fb_xrgb8888_to_rgb565(&dst, &result->dst_pitch, &src, &fb, ¶ms->clip, false); + buf = le16buf_to_cpu(test, (__force const __le16 *)buf, dst_size / sizeof(__le16)); KUNIT_EXPECT_EQ(test, memcmp(buf, result->expected, dst_size), 0); + buf = dst.vaddr; /* restore original value of buf */ drm_fb_xrgb8888_to_rgb565(&dst, &result->dst_pitch, &src, &fb, ¶ms->clip, true); + buf = le16buf_to_cpu(test, (__force const __le16 *)buf, dst_size / sizeof(__le16)); KUNIT_EXPECT_EQ(test, memcmp(buf, result->expected_swab, dst_size), 0); } -- cgit v1.2.3 From 4db88a9026c22059a10e74789f2fcc6a424ab4cc Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Mon, 2 Jan 2023 12:29:19 +0100 Subject: drm/format-helper: Type fixes in format-helper tests MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change the source-buffer type of le32buf_to_cpu() to __le32* to reflect endianness. Result buffers are converted to local endianness, so instantiate them from regular u8 or u32 types. Signed-off-by: Thomas Zimmermann Reviewed-by: Maíra Canal Reviewed-by: José Expósito Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-6-tzimmermann@suse.de --- drivers/gpu/drm/tests/drm_format_helper_test.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/tests/drm_format_helper_test.c b/drivers/gpu/drm/tests/drm_format_helper_test.c index 04fe373c9d97..c2411ec808a1 100644 --- a/drivers/gpu/drm/tests/drm_format_helper_test.c +++ b/drivers/gpu/drm/tests/drm_format_helper_test.c @@ -279,7 +279,7 @@ static u16 *le16buf_to_cpu(struct kunit *test, const __le16 *buf, size_t buf_siz return dst; } -static u32 *le32buf_to_cpu(struct kunit *test, const u32 *buf, size_t buf_size) +static u32 *le32buf_to_cpu(struct kunit *test, const __le32 *buf, size_t buf_size) { u32 *dst = NULL; int n; @@ -323,7 +323,7 @@ static void drm_test_fb_xrgb8888_to_gray8(struct kunit *test) const struct convert_xrgb8888_case *params = test->param_value; const struct convert_to_gray8_result *result = ¶ms->gray8_result; size_t dst_size; - __u8 *buf = NULL; + u8 *buf = NULL; __le32 *xrgb8888 = NULL; struct iosys_map dst, src; @@ -353,7 +353,7 @@ static void drm_test_fb_xrgb8888_to_rgb332(struct kunit *test) const struct convert_xrgb8888_case *params = test->param_value; const struct convert_to_rgb332_result *result = ¶ms->rgb332_result; size_t dst_size; - __u8 *buf = NULL; + u8 *buf = NULL; __le32 *xrgb8888 = NULL; struct iosys_map dst, src; @@ -419,7 +419,7 @@ static void drm_test_fb_xrgb8888_to_rgb888(struct kunit *test) const struct convert_xrgb8888_case *params = test->param_value; const struct convert_to_rgb888_result *result = ¶ms->rgb888_result; size_t dst_size; - __u8 *buf = NULL; + u8 *buf = NULL; __le32 *xrgb8888 = NULL; struct iosys_map dst, src; @@ -453,7 +453,7 @@ static void drm_test_fb_xrgb8888_to_xrgb2101010(struct kunit *test) const struct convert_xrgb8888_case *params = test->param_value; const struct convert_to_xrgb2101010_result *result = ¶ms->xrgb2101010_result; size_t dst_size; - __u32 *buf = NULL; + u32 *buf = NULL; __le32 *xrgb8888 = NULL; struct iosys_map dst, src; @@ -475,7 +475,7 @@ static void drm_test_fb_xrgb8888_to_xrgb2101010(struct kunit *test) iosys_map_set_vaddr(&src, xrgb8888); drm_fb_xrgb8888_to_xrgb2101010(&dst, &result->dst_pitch, &src, &fb, ¶ms->clip); - buf = le32buf_to_cpu(test, buf, dst_size / sizeof(u32)); + buf = le32buf_to_cpu(test, (__force const __le32 *)buf, dst_size / sizeof(u32)); KUNIT_EXPECT_EQ(test, memcmp(buf, result->expected, dst_size), 0); } -- cgit v1.2.3 From f238ac30afde0da3dcc047ba6f735837a238f2b1 Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Mon, 2 Jan 2023 12:29:20 +0100 Subject: drm/format-helper: Flip src/dst-format branches in blit helper Upcoming changes to the format conversion will mostly blit from XRGB8888 to some other format. So put the source format in blit's outer branches to make the code more readable. For cases where a format only changes its endianness, such as XRGB565, introduce dedicated branches that handle this for all formats. Signed-off-by: Thomas Zimmermann Reviewed-by: Javier Martinez Canillas Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-7-tzimmermann@suse.de --- drivers/gpu/drm/drm_format_helper.c | 44 +++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/drm_format_helper.c b/drivers/gpu/drm/drm_format_helper.c index f3f3b3809a3e..36d2ca9d0f01 100644 --- a/drivers/gpu/drm/drm_format_helper.c +++ b/drivers/gpu/drm/drm_format_helper.c @@ -653,41 +653,37 @@ int drm_fb_blit(struct iosys_map *dst, const unsigned int *dst_pitch, uint32_t d if (dst_format == DRM_FORMAT_ARGB2101010) dst_format = DRM_FORMAT_XRGB2101010; - if (dst_format == fb_format) { + if (fb_format == dst_format) { drm_fb_memcpy(dst, dst_pitch, src, fb, clip); return 0; - - } else if (dst_format == DRM_FORMAT_RGB565) { - if (fb_format == DRM_FORMAT_XRGB8888) { + } else if (fb_format == (dst_format | DRM_FORMAT_BIG_ENDIAN)) { + drm_fb_swab(dst, dst_pitch, src, fb, clip, false); + return 0; + } else if (fb_format == (dst_format & ~DRM_FORMAT_BIG_ENDIAN)) { + drm_fb_swab(dst, dst_pitch, src, fb, clip, false); + return 0; + } else if (fb_format == DRM_FORMAT_XRGB8888) { + if (dst_format == DRM_FORMAT_RGB565) { drm_fb_xrgb8888_to_rgb565(dst, dst_pitch, src, fb, clip, false); return 0; - } - } else if (dst_format == (DRM_FORMAT_RGB565 | DRM_FORMAT_BIG_ENDIAN)) { - if (fb_format == DRM_FORMAT_RGB565) { - drm_fb_swab(dst, dst_pitch, src, fb, clip, false); - return 0; - } - } else if (dst_format == DRM_FORMAT_RGB888) { - if (fb_format == DRM_FORMAT_XRGB8888) { + } else if (dst_format == DRM_FORMAT_RGB888) { drm_fb_xrgb8888_to_rgb888(dst, dst_pitch, src, fb, clip); return 0; - } - } else if (dst_format == DRM_FORMAT_XRGB8888) { - if (fb_format == DRM_FORMAT_RGB888) { - drm_fb_rgb888_to_xrgb8888(dst, dst_pitch, src, fb, clip); + } else if (dst_format == DRM_FORMAT_XRGB2101010) { + drm_fb_xrgb8888_to_xrgb2101010(dst, dst_pitch, src, fb, clip); return 0; - } else if (fb_format == DRM_FORMAT_RGB565) { - drm_fb_rgb565_to_xrgb8888(dst, dst_pitch, src, fb, clip); + } else if (dst_format == DRM_FORMAT_BGRX8888) { + drm_fb_swab(dst, dst_pitch, src, fb, clip, false); return 0; } - } else if (dst_format == DRM_FORMAT_XRGB2101010) { - if (fb_format == DRM_FORMAT_XRGB8888) { - drm_fb_xrgb8888_to_xrgb2101010(dst, dst_pitch, src, fb, clip); + } else if (fb_format == DRM_FORMAT_RGB888) { + if (dst_format == DRM_FORMAT_XRGB8888) { + drm_fb_rgb888_to_xrgb8888(dst, dst_pitch, src, fb, clip); return 0; } - } else if (dst_format == DRM_FORMAT_BGRX8888) { - if (fb_format == DRM_FORMAT_XRGB8888) { - drm_fb_swab(dst, dst_pitch, src, fb, clip, false); + } else if (fb_format == DRM_FORMAT_RGB565) { + if (dst_format == DRM_FORMAT_XRGB8888) { + drm_fb_rgb565_to_xrgb8888(dst, dst_pitch, src, fb, clip); return 0; } } -- cgit v1.2.3 From 175073d694cd9db4c4ca97c978a447acc6b5cb33 Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Mon, 2 Jan 2023 12:29:21 +0100 Subject: drm/format-helper: Add conversion from XRGB8888 to ARGB8888 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add dedicated helper to convert from XRGB8888 to ARGB8888. Sets all alpha bits to make pixels fully opaque. v3: * use __le32 for destination buffer (Jose, kernel test robot) v2: * use cpubuf_to_le32() * type fixes Signed-off-by: Thomas Zimmermann Reviewed-by: Javier Martinez Canillas Reviewed-by: José Expósito Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-8-tzimmermann@suse.de --- drivers/gpu/drm/drm_format_helper.c | 53 +++++++++++++++++++++- drivers/gpu/drm/tests/drm_format_helper_test.c | 63 ++++++++++++++++++++++++++ include/drm/drm_format_helper.h | 3 ++ 3 files changed, 117 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_format_helper.c b/drivers/gpu/drm/drm_format_helper.c index 36d2ca9d0f01..718e29341773 100644 --- a/drivers/gpu/drm/drm_format_helper.c +++ b/drivers/gpu/drm/drm_format_helper.c @@ -446,6 +446,54 @@ void drm_fb_xrgb8888_to_rgb888(struct iosys_map *dst, const unsigned int *dst_pi } EXPORT_SYMBOL(drm_fb_xrgb8888_to_rgb888); +static void drm_fb_xrgb8888_to_argb8888_line(void *dbuf, const void *sbuf, unsigned int pixels) +{ + __le32 *dbuf32 = dbuf; + const __le32 *sbuf32 = sbuf; + unsigned int x; + u32 pix; + + for (x = 0; x < pixels; x++) { + pix = le32_to_cpu(sbuf32[x]); + pix |= GENMASK(31, 24); /* fill alpha bits */ + dbuf32[x] = cpu_to_le32(pix); + } +} + +/** + * drm_fb_xrgb8888_to_argb8888 - Convert XRGB8888 to ARGB8888 clip buffer + * @dst: Array of ARGB8888 destination buffers + * @dst_pitch: Array of numbers of bytes between the start of two consecutive scanlines + * within @dst; can be NULL if scanlines are stored next to each other. + * @src: Array of XRGB8888 source buffer + * @fb: DRM framebuffer + * @clip: Clip rectangle area to copy + * + * This function copies parts of a framebuffer to display memory and converts the + * color format during the process. The parameters @dst, @dst_pitch and @src refer + * to arrays. Each array must have at least as many entries as there are planes in + * @fb's format. Each entry stores the value for the format's respective color plane + * at the same index. + * + * This function does not apply clipping on @dst (i.e. the destination is at the + * top-left corner). + * + * Drivers can use this function for ARGB8888 devices that don't support XRGB8888 + * natively. It sets an opaque alpha channel as part of the conversion. + */ +void drm_fb_xrgb8888_to_argb8888(struct iosys_map *dst, const unsigned int *dst_pitch, + const struct iosys_map *src, const struct drm_framebuffer *fb, + const struct drm_rect *clip) +{ + static const u8 dst_pixsize[DRM_FORMAT_MAX_PLANES] = { + 4, + }; + + drm_fb_xfrm(dst, dst_pitch, dst_pixsize, src, fb, clip, false, + drm_fb_xrgb8888_to_argb8888_line); +} +EXPORT_SYMBOL(drm_fb_xrgb8888_to_argb8888); + static void drm_fb_rgb565_to_xrgb8888_line(void *dbuf, const void *sbuf, unsigned int pixels) { __le32 *dbuf32 = dbuf; @@ -646,8 +694,6 @@ int drm_fb_blit(struct iosys_map *dst, const unsigned int *dst_pitch, uint32_t d /* treat alpha channel like filler bits */ if (fb_format == DRM_FORMAT_ARGB8888) fb_format = DRM_FORMAT_XRGB8888; - if (dst_format == DRM_FORMAT_ARGB8888) - dst_format = DRM_FORMAT_XRGB8888; if (fb_format == DRM_FORMAT_ARGB2101010) fb_format = DRM_FORMAT_XRGB2101010; if (dst_format == DRM_FORMAT_ARGB2101010) @@ -669,6 +715,9 @@ int drm_fb_blit(struct iosys_map *dst, const unsigned int *dst_pitch, uint32_t d } else if (dst_format == DRM_FORMAT_RGB888) { drm_fb_xrgb8888_to_rgb888(dst, dst_pitch, src, fb, clip); return 0; + } else if (dst_format == DRM_FORMAT_ARGB8888) { + drm_fb_xrgb8888_to_argb8888(dst, dst_pitch, src, fb, clip); + return 0; } else if (dst_format == DRM_FORMAT_XRGB2101010) { drm_fb_xrgb8888_to_xrgb2101010(dst, dst_pitch, src, fb, clip); return 0; diff --git a/drivers/gpu/drm/tests/drm_format_helper_test.c b/drivers/gpu/drm/tests/drm_format_helper_test.c index c2411ec808a1..bc969413a412 100644 --- a/drivers/gpu/drm/tests/drm_format_helper_test.c +++ b/drivers/gpu/drm/tests/drm_format_helper_test.c @@ -37,6 +37,11 @@ struct convert_to_rgb888_result { const u8 expected[TEST_BUF_SIZE]; }; +struct convert_to_argb8888_result { + unsigned int dst_pitch; + const u32 expected[TEST_BUF_SIZE]; +}; + struct convert_to_xrgb2101010_result { unsigned int dst_pitch; const u32 expected[TEST_BUF_SIZE]; @@ -51,6 +56,7 @@ struct convert_xrgb8888_case { struct convert_to_rgb332_result rgb332_result; struct convert_to_rgb565_result rgb565_result; struct convert_to_rgb888_result rgb888_result; + struct convert_to_argb8888_result argb8888_result; struct convert_to_xrgb2101010_result xrgb2101010_result; }; @@ -77,6 +83,10 @@ static struct convert_xrgb8888_case convert_xrgb8888_cases[] = { .dst_pitch = 0, .expected = { 0x00, 0x00, 0xFF }, }, + .argb8888_result = { + .dst_pitch = 0, + .expected = { 0xFFFF0000 }, + }, .xrgb2101010_result = { .dst_pitch = 0, .expected = { 0x3FF00000 }, @@ -107,6 +117,10 @@ static struct convert_xrgb8888_case convert_xrgb8888_cases[] = { .dst_pitch = 0, .expected = { 0x00, 0x00, 0xFF }, }, + .argb8888_result = { + .dst_pitch = 0, + .expected = { 0xFFFF0000 }, + }, .xrgb2101010_result = { .dst_pitch = 0, .expected = { 0x3FF00000 }, @@ -169,6 +183,15 @@ static struct convert_xrgb8888_case convert_xrgb8888_cases[] = { 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, }, }, + .argb8888_result = { + .dst_pitch = 0, + .expected = { + 0xFFFFFFFF, 0xFF000000, + 0xFFFF0000, 0xFF00FF00, + 0xFF0000FF, 0xFFFF00FF, + 0xFFFFFF00, 0xFF00FFFF, + }, + }, .xrgb2101010_result = { .dst_pitch = 0, .expected = { @@ -229,6 +252,14 @@ static struct convert_xrgb8888_case convert_xrgb8888_cases[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }, }, + .argb8888_result = { + .dst_pitch = 20, + .expected = { + 0xFF0E449C, 0xFF114D05, 0xFFA80303, 0x00000000, 0x00000000, + 0xFF6C7073, 0xFF0E449C, 0xFF114D05, 0x00000000, 0x00000000, + 0xFFA80303, 0xFF6C7073, 0xFF0E449C, 0x00000000, 0x00000000, + }, + }, .xrgb2101010_result = { .dst_pitch = 20, .expected = { @@ -448,6 +479,37 @@ static void drm_test_fb_xrgb8888_to_rgb888(struct kunit *test) KUNIT_EXPECT_EQ(test, memcmp(buf, result->expected, dst_size), 0); } +static void drm_test_fb_xrgb8888_to_argb8888(struct kunit *test) +{ + const struct convert_xrgb8888_case *params = test->param_value; + const struct convert_to_argb8888_result *result = ¶ms->argb8888_result; + size_t dst_size; + u32 *buf = NULL; + __le32 *xrgb8888 = NULL; + struct iosys_map dst, src; + + struct drm_framebuffer fb = { + .format = drm_format_info(DRM_FORMAT_XRGB8888), + .pitches = { params->pitch, 0, 0 }, + }; + + dst_size = conversion_buf_size(DRM_FORMAT_ARGB8888, + result->dst_pitch, ¶ms->clip); + KUNIT_ASSERT_GT(test, dst_size, 0); + + buf = kunit_kzalloc(test, dst_size, GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf); + iosys_map_set_vaddr(&dst, buf); + + xrgb8888 = cpubuf_to_le32(test, params->xrgb8888, TEST_BUF_SIZE); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xrgb8888); + iosys_map_set_vaddr(&src, xrgb8888); + + drm_fb_xrgb8888_to_argb8888(&dst, &result->dst_pitch, &src, &fb, ¶ms->clip); + buf = le32buf_to_cpu(test, (__force const __le32 *)buf, dst_size / sizeof(u32)); + KUNIT_EXPECT_EQ(test, memcmp(buf, result->expected, dst_size), 0); +} + static void drm_test_fb_xrgb8888_to_xrgb2101010(struct kunit *test) { const struct convert_xrgb8888_case *params = test->param_value; @@ -484,6 +546,7 @@ static struct kunit_case drm_format_helper_test_cases[] = { KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_rgb332, convert_xrgb8888_gen_params), KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_rgb565, convert_xrgb8888_gen_params), KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_rgb888, convert_xrgb8888_gen_params), + KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_argb8888, convert_xrgb8888_gen_params), KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_xrgb2101010, convert_xrgb8888_gen_params), {} }; diff --git a/include/drm/drm_format_helper.h b/include/drm/drm_format_helper.h index eb5c98cf82b8..3ce8129dfe43 100644 --- a/include/drm/drm_format_helper.h +++ b/include/drm/drm_format_helper.h @@ -33,6 +33,9 @@ void drm_fb_xrgb8888_to_rgb565(struct iosys_map *dst, const unsigned int *dst_pi void drm_fb_xrgb8888_to_rgb888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip); +void drm_fb_xrgb8888_to_argb8888(struct iosys_map *dst, const unsigned int *dst_pitch, + const struct iosys_map *src, const struct drm_framebuffer *fb, + const struct drm_rect *clip); void drm_fb_xrgb8888_to_xrgb2101010(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip); -- cgit v1.2.3 From 56119bfb39142090fb84ac08a3f14dd48410e961 Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Mon, 2 Jan 2023 12:29:22 +0100 Subject: drm/format-helper: Add conversion from XRGB8888 to ARGB2101010 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add dedicated helper to convert from XRGB8888 to ARGB2101010. Sets all alpha bits to make pixels fully opaque. v2: * set correct format in struct drm_framebuffer (Javier) * use cpubuf_to_le32() * type fixes Signed-off-by: Thomas Zimmermann Reviewed-by: Javier Martinez Canillas Reviewed-by: José Expósito Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-9-tzimmermann@suse.de --- drivers/gpu/drm/drm_format_helper.c | 58 +++++++++++++++++++++++- drivers/gpu/drm/tests/drm_format_helper_test.c | 63 ++++++++++++++++++++++++++ include/drm/drm_format_helper.h | 3 ++ 3 files changed, 122 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_format_helper.c b/drivers/gpu/drm/drm_format_helper.c index 718e29341773..33780c9183bb 100644 --- a/drivers/gpu/drm/drm_format_helper.c +++ b/drivers/gpu/drm/drm_format_helper.c @@ -605,6 +605,59 @@ void drm_fb_xrgb8888_to_xrgb2101010(struct iosys_map *dst, const unsigned int *d } EXPORT_SYMBOL(drm_fb_xrgb8888_to_xrgb2101010); +static void drm_fb_xrgb8888_to_argb2101010_line(void *dbuf, const void *sbuf, unsigned int pixels) +{ + __le32 *dbuf32 = dbuf; + const __le32 *sbuf32 = sbuf; + unsigned int x; + u32 val32; + u32 pix; + + for (x = 0; x < pixels; x++) { + pix = le32_to_cpu(sbuf32[x]); + val32 = ((pix & 0x000000ff) << 2) | + ((pix & 0x0000ff00) << 4) | + ((pix & 0x00ff0000) << 6); + pix = GENMASK(31, 30) | /* set alpha bits */ + val32 | ((val32 >> 8) & 0x00300c03); + *dbuf32++ = cpu_to_le32(pix); + } +} + +/** + * drm_fb_xrgb8888_to_argb2101010 - Convert XRGB8888 to ARGB2101010 clip buffer + * @dst: Array of ARGB2101010 destination buffers + * @dst_pitch: Array of numbers of bytes between the start of two consecutive scanlines + * within @dst; can be NULL if scanlines are stored next to each other. + * @src: Array of XRGB8888 source buffers + * @fb: DRM framebuffer + * @clip: Clip rectangle area to copy + * + * This function copies parts of a framebuffer to display memory and converts + * the color format during the process. The parameters @dst, @dst_pitch and + * @src refer to arrays. Each array must have at least as many entries as + * there are planes in @fb's format. Each entry stores the value for the + * format's respective color plane at the same index. + * + * This function does not apply clipping on @dst (i.e. the destination is at the + * top-left corner). + * + * Drivers can use this function for ARGB2101010 devices that don't support XRGB8888 + * natively. + */ +void drm_fb_xrgb8888_to_argb2101010(struct iosys_map *dst, const unsigned int *dst_pitch, + const struct iosys_map *src, const struct drm_framebuffer *fb, + const struct drm_rect *clip) +{ + static const u8 dst_pixsize[DRM_FORMAT_MAX_PLANES] = { + 4, + }; + + drm_fb_xfrm(dst, dst_pitch, dst_pixsize, src, fb, clip, false, + drm_fb_xrgb8888_to_argb2101010_line); +} +EXPORT_SYMBOL(drm_fb_xrgb8888_to_argb2101010); + static void drm_fb_xrgb8888_to_gray8_line(void *dbuf, const void *sbuf, unsigned int pixels) { u8 *dbuf8 = dbuf; @@ -696,8 +749,6 @@ int drm_fb_blit(struct iosys_map *dst, const unsigned int *dst_pitch, uint32_t d fb_format = DRM_FORMAT_XRGB8888; if (fb_format == DRM_FORMAT_ARGB2101010) fb_format = DRM_FORMAT_XRGB2101010; - if (dst_format == DRM_FORMAT_ARGB2101010) - dst_format = DRM_FORMAT_XRGB2101010; if (fb_format == dst_format) { drm_fb_memcpy(dst, dst_pitch, src, fb, clip); @@ -721,6 +772,9 @@ int drm_fb_blit(struct iosys_map *dst, const unsigned int *dst_pitch, uint32_t d } else if (dst_format == DRM_FORMAT_XRGB2101010) { drm_fb_xrgb8888_to_xrgb2101010(dst, dst_pitch, src, fb, clip); return 0; + } else if (dst_format == DRM_FORMAT_ARGB2101010) { + drm_fb_xrgb8888_to_argb2101010(dst, dst_pitch, src, fb, clip); + return 0; } else if (dst_format == DRM_FORMAT_BGRX8888) { drm_fb_swab(dst, dst_pitch, src, fb, clip, false); return 0; diff --git a/drivers/gpu/drm/tests/drm_format_helper_test.c b/drivers/gpu/drm/tests/drm_format_helper_test.c index bc969413a412..de3aa252e8eb 100644 --- a/drivers/gpu/drm/tests/drm_format_helper_test.c +++ b/drivers/gpu/drm/tests/drm_format_helper_test.c @@ -47,6 +47,11 @@ struct convert_to_xrgb2101010_result { const u32 expected[TEST_BUF_SIZE]; }; +struct convert_to_argb2101010_result { + unsigned int dst_pitch; + const u32 expected[TEST_BUF_SIZE]; +}; + struct convert_xrgb8888_case { const char *name; unsigned int pitch; @@ -58,6 +63,7 @@ struct convert_xrgb8888_case { struct convert_to_rgb888_result rgb888_result; struct convert_to_argb8888_result argb8888_result; struct convert_to_xrgb2101010_result xrgb2101010_result; + struct convert_to_argb2101010_result argb2101010_result; }; static struct convert_xrgb8888_case convert_xrgb8888_cases[] = { @@ -91,6 +97,10 @@ static struct convert_xrgb8888_case convert_xrgb8888_cases[] = { .dst_pitch = 0, .expected = { 0x3FF00000 }, }, + .argb2101010_result = { + .dst_pitch = 0, + .expected = { 0xFFF00000 }, + }, }, { .name = "single_pixel_clip_rectangle", @@ -125,6 +135,10 @@ static struct convert_xrgb8888_case convert_xrgb8888_cases[] = { .dst_pitch = 0, .expected = { 0x3FF00000 }, }, + .argb2101010_result = { + .dst_pitch = 0, + .expected = { 0xFFF00000 }, + }, }, { /* Well known colors: White, black, red, green, blue, magenta, @@ -201,6 +215,15 @@ static struct convert_xrgb8888_case convert_xrgb8888_cases[] = { 0x3FFFFC00, 0x000FFFFF, }, }, + .argb2101010_result = { + .dst_pitch = 0, + .expected = { + 0xFFFFFFFF, 0xC0000000, + 0xFFF00000, 0xC00FFC00, + 0xC00003FF, 0xFFF003FF, + 0xFFFFFC00, 0xC00FFFFF, + }, + }, }, { /* Randomly picked colors. Full buffer within the clip area. */ @@ -268,6 +291,14 @@ static struct convert_xrgb8888_case convert_xrgb8888_cases[] = { 0x2A20300C, 0x1B1705CD, 0x03844672, 0x00000000, 0x00000000, }, }, + .argb2101010_result = { + .dst_pitch = 20, + .expected = { + 0xC3844672, 0xC444D414, 0xEA20300C, 0x00000000, 0x00000000, + 0xDB1705CD, 0xC3844672, 0xC444D414, 0x00000000, 0x00000000, + 0xEA20300C, 0xDB1705CD, 0xC3844672, 0x00000000, 0x00000000, + }, + }, }, }; @@ -541,6 +572,37 @@ static void drm_test_fb_xrgb8888_to_xrgb2101010(struct kunit *test) KUNIT_EXPECT_EQ(test, memcmp(buf, result->expected, dst_size), 0); } +static void drm_test_fb_xrgb8888_to_argb2101010(struct kunit *test) +{ + const struct convert_xrgb8888_case *params = test->param_value; + const struct convert_to_argb2101010_result *result = ¶ms->argb2101010_result; + size_t dst_size; + u32 *buf = NULL; + __le32 *xrgb8888 = NULL; + struct iosys_map dst, src; + + struct drm_framebuffer fb = { + .format = drm_format_info(DRM_FORMAT_XRGB8888), + .pitches = { params->pitch, 0, 0 }, + }; + + dst_size = conversion_buf_size(DRM_FORMAT_ARGB2101010, + result->dst_pitch, ¶ms->clip); + KUNIT_ASSERT_GT(test, dst_size, 0); + + buf = kunit_kzalloc(test, dst_size, GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf); + iosys_map_set_vaddr(&dst, buf); + + xrgb8888 = cpubuf_to_le32(test, params->xrgb8888, TEST_BUF_SIZE); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xrgb8888); + iosys_map_set_vaddr(&src, xrgb8888); + + drm_fb_xrgb8888_to_argb2101010(&dst, &result->dst_pitch, &src, &fb, ¶ms->clip); + buf = le32buf_to_cpu(test, (__force const __le32 *)buf, dst_size / sizeof(u32)); + KUNIT_EXPECT_EQ(test, memcmp(buf, result->expected, dst_size), 0); +} + static struct kunit_case drm_format_helper_test_cases[] = { KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_gray8, convert_xrgb8888_gen_params), KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_rgb332, convert_xrgb8888_gen_params), @@ -548,6 +610,7 @@ static struct kunit_case drm_format_helper_test_cases[] = { KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_rgb888, convert_xrgb8888_gen_params), KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_argb8888, convert_xrgb8888_gen_params), KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_xrgb2101010, convert_xrgb8888_gen_params), + KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_argb2101010, convert_xrgb8888_gen_params), {} }; diff --git a/include/drm/drm_format_helper.h b/include/drm/drm_format_helper.h index 3ce8129dfe43..10b2d19cdb66 100644 --- a/include/drm/drm_format_helper.h +++ b/include/drm/drm_format_helper.h @@ -39,6 +39,9 @@ void drm_fb_xrgb8888_to_argb8888(struct iosys_map *dst, const unsigned int *dst_ void drm_fb_xrgb8888_to_xrgb2101010(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip); +void drm_fb_xrgb8888_to_argb2101010(struct iosys_map *dst, const unsigned int *dst_pitch, + const struct iosys_map *src, const struct drm_framebuffer *fb, + const struct drm_rect *clip); void drm_fb_xrgb8888_to_gray8(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip); -- cgit v1.2.3 From 10cd592e639edcea50d781a07edcf3470d1f222e Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Mon, 2 Jan 2023 12:29:23 +0100 Subject: drm/format-helper: Add conversion from XRGB8888 to 15-bit RGB555 formats MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add conversion from XRGB8888 to XRGB1555, ARGB1555 and RGBA5551, which are the formats currently supported by the simplefb infrastructure. The new helpers allow the output of XRGB8888 framebuffers to firmware scanout buffers in one of the 15-bit formats. v3: * use __le* for destination buffers (Jose, kernel test robot) v2: * test 15-bit results with local endianness (Jose) Signed-off-by: Thomas Zimmermann Reviewed-by: Javier Martinez Canillas Reviewed-by: José Expósito Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-10-tzimmermann@suse.de --- drivers/gpu/drm/drm_format_helper.c | 164 +++++++++++++++++++++ drivers/gpu/drm/tests/drm_format_helper_test.c | 189 +++++++++++++++++++++++++ include/drm/drm_format_helper.h | 9 ++ 3 files changed, 362 insertions(+) diff --git a/drivers/gpu/drm/drm_format_helper.c b/drivers/gpu/drm/drm_format_helper.c index 33780c9183bb..d631627e6c39 100644 --- a/drivers/gpu/drm/drm_format_helper.c +++ b/drivers/gpu/drm/drm_format_helper.c @@ -396,6 +396,161 @@ void drm_fb_xrgb8888_to_rgb565(struct iosys_map *dst, const unsigned int *dst_pi } EXPORT_SYMBOL(drm_fb_xrgb8888_to_rgb565); +static void drm_fb_xrgb8888_to_xrgb1555_line(void *dbuf, const void *sbuf, unsigned int pixels) +{ + __le16 *dbuf16 = dbuf; + const __le32 *sbuf32 = sbuf; + unsigned int x; + u16 val16; + u32 pix; + + for (x = 0; x < pixels; x++) { + pix = le32_to_cpu(sbuf32[x]); + val16 = ((pix & 0x00f80000) >> 9) | + ((pix & 0x0000f800) >> 6) | + ((pix & 0x000000f8) >> 3); + dbuf16[x] = cpu_to_le16(val16); + } +} + +/** + * drm_fb_xrgb8888_to_xrgb1555 - Convert XRGB8888 to XRGB1555 clip buffer + * @dst: Array of XRGB1555 destination buffers + * @dst_pitch: Array of numbers of bytes between the start of two consecutive scanlines + * within @dst; can be NULL if scanlines are stored next to each other. + * @src: Array of XRGB8888 source buffer + * @fb: DRM framebuffer + * @clip: Clip rectangle area to copy + * + * This function copies parts of a framebuffer to display memory and converts + * the color format during the process. The parameters @dst, @dst_pitch and + * @src refer to arrays. Each array must have at least as many entries as + * there are planes in @fb's format. Each entry stores the value for the + * format's respective color plane at the same index. + * + * This function does not apply clipping on @dst (i.e. the destination is at the + * top-left corner). + * + * Drivers can use this function for XRGB1555 devices that don't support + * XRGB8888 natively. + */ +void drm_fb_xrgb8888_to_xrgb1555(struct iosys_map *dst, const unsigned int *dst_pitch, + const struct iosys_map *src, const struct drm_framebuffer *fb, + const struct drm_rect *clip) +{ + static const u8 dst_pixsize[DRM_FORMAT_MAX_PLANES] = { + 2, + }; + + drm_fb_xfrm(dst, dst_pitch, dst_pixsize, src, fb, clip, false, + drm_fb_xrgb8888_to_xrgb1555_line); +} +EXPORT_SYMBOL(drm_fb_xrgb8888_to_xrgb1555); + +static void drm_fb_xrgb8888_to_argb1555_line(void *dbuf, const void *sbuf, unsigned int pixels) +{ + __le16 *dbuf16 = dbuf; + const __le32 *sbuf32 = sbuf; + unsigned int x; + u16 val16; + u32 pix; + + for (x = 0; x < pixels; x++) { + pix = le32_to_cpu(sbuf32[x]); + val16 = BIT(15) | /* set alpha bit */ + ((pix & 0x00f80000) >> 9) | + ((pix & 0x0000f800) >> 6) | + ((pix & 0x000000f8) >> 3); + dbuf16[x] = cpu_to_le16(val16); + } +} + +/** + * drm_fb_xrgb8888_to_argb1555 - Convert XRGB8888 to ARGB1555 clip buffer + * @dst: Array of ARGB1555 destination buffers + * @dst_pitch: Array of numbers of bytes between the start of two consecutive scanlines + * within @dst; can be NULL if scanlines are stored next to each other. + * @src: Array of XRGB8888 source buffer + * @fb: DRM framebuffer + * @clip: Clip rectangle area to copy + * + * This function copies parts of a framebuffer to display memory and converts + * the color format during the process. The parameters @dst, @dst_pitch and + * @src refer to arrays. Each array must have at least as many entries as + * there are planes in @fb's format. Each entry stores the value for the + * format's respective color plane at the same index. + * + * This function does not apply clipping on @dst (i.e. the destination is at the + * top-left corner). + * + * Drivers can use this function for ARGB1555 devices that don't support + * XRGB8888 natively. It sets an opaque alpha channel as part of the conversion. + */ +void drm_fb_xrgb8888_to_argb1555(struct iosys_map *dst, const unsigned int *dst_pitch, + const struct iosys_map *src, const struct drm_framebuffer *fb, + const struct drm_rect *clip) +{ + static const u8 dst_pixsize[DRM_FORMAT_MAX_PLANES] = { + 2, + }; + + drm_fb_xfrm(dst, dst_pitch, dst_pixsize, src, fb, clip, false, + drm_fb_xrgb8888_to_argb1555_line); +} +EXPORT_SYMBOL(drm_fb_xrgb8888_to_argb1555); + +static void drm_fb_xrgb8888_to_rgba5551_line(void *dbuf, const void *sbuf, unsigned int pixels) +{ + __le16 *dbuf16 = dbuf; + const __le32 *sbuf32 = sbuf; + unsigned int x; + u16 val16; + u32 pix; + + for (x = 0; x < pixels; x++) { + pix = le32_to_cpu(sbuf32[x]); + val16 = ((pix & 0x00f80000) >> 8) | + ((pix & 0x0000f800) >> 5) | + ((pix & 0x000000f8) >> 2) | + BIT(0); /* set alpha bit */ + dbuf16[x] = cpu_to_le16(val16); + } +} + +/** + * drm_fb_xrgb8888_to_rgba5551 - Convert XRGB8888 to RGBA5551 clip buffer + * @dst: Array of RGBA5551 destination buffers + * @dst_pitch: Array of numbers of bytes between the start of two consecutive scanlines + * within @dst; can be NULL if scanlines are stored next to each other. + * @src: Array of XRGB8888 source buffer + * @fb: DRM framebuffer + * @clip: Clip rectangle area to copy + * + * This function copies parts of a framebuffer to display memory and converts + * the color format during the process. The parameters @dst, @dst_pitch and + * @src refer to arrays. Each array must have at least as many entries as + * there are planes in @fb's format. Each entry stores the value for the + * format's respective color plane at the same index. + * + * This function does not apply clipping on @dst (i.e. the destination is at the + * top-left corner). + * + * Drivers can use this function for RGBA5551 devices that don't support + * XRGB8888 natively. It sets an opaque alpha channel as part of the conversion. + */ +void drm_fb_xrgb8888_to_rgba5551(struct iosys_map *dst, const unsigned int *dst_pitch, + const struct iosys_map *src, const struct drm_framebuffer *fb, + const struct drm_rect *clip) +{ + static const u8 dst_pixsize[DRM_FORMAT_MAX_PLANES] = { + 2, + }; + + drm_fb_xfrm(dst, dst_pitch, dst_pixsize, src, fb, clip, false, + drm_fb_xrgb8888_to_rgba5551_line); +} +EXPORT_SYMBOL(drm_fb_xrgb8888_to_rgba5551); + static void drm_fb_xrgb8888_to_rgb888_line(void *dbuf, const void *sbuf, unsigned int pixels) { u8 *dbuf8 = dbuf; @@ -763,6 +918,15 @@ int drm_fb_blit(struct iosys_map *dst, const unsigned int *dst_pitch, uint32_t d if (dst_format == DRM_FORMAT_RGB565) { drm_fb_xrgb8888_to_rgb565(dst, dst_pitch, src, fb, clip, false); return 0; + } else if (dst_format == DRM_FORMAT_XRGB1555) { + drm_fb_xrgb8888_to_xrgb1555(dst, dst_pitch, src, fb, clip); + return 0; + } else if (dst_format == DRM_FORMAT_ARGB1555) { + drm_fb_xrgb8888_to_argb1555(dst, dst_pitch, src, fb, clip); + return 0; + } else if (dst_format == DRM_FORMAT_RGBA5551) { + drm_fb_xrgb8888_to_rgba5551(dst, dst_pitch, src, fb, clip); + return 0; } else if (dst_format == DRM_FORMAT_RGB888) { drm_fb_xrgb8888_to_rgb888(dst, dst_pitch, src, fb, clip); return 0; diff --git a/drivers/gpu/drm/tests/drm_format_helper_test.c b/drivers/gpu/drm/tests/drm_format_helper_test.c index de3aa252e8eb..f71dc0fe08a1 100644 --- a/drivers/gpu/drm/tests/drm_format_helper_test.c +++ b/drivers/gpu/drm/tests/drm_format_helper_test.c @@ -32,6 +32,21 @@ struct convert_to_rgb565_result { const u16 expected_swab[TEST_BUF_SIZE]; }; +struct convert_to_xrgb1555_result { + unsigned int dst_pitch; + const u16 expected[TEST_BUF_SIZE]; +}; + +struct convert_to_argb1555_result { + unsigned int dst_pitch; + const u16 expected[TEST_BUF_SIZE]; +}; + +struct convert_to_rgba5551_result { + unsigned int dst_pitch; + const u16 expected[TEST_BUF_SIZE]; +}; + struct convert_to_rgb888_result { unsigned int dst_pitch; const u8 expected[TEST_BUF_SIZE]; @@ -60,6 +75,9 @@ struct convert_xrgb8888_case { struct convert_to_gray8_result gray8_result; struct convert_to_rgb332_result rgb332_result; struct convert_to_rgb565_result rgb565_result; + struct convert_to_xrgb1555_result xrgb1555_result; + struct convert_to_argb1555_result argb1555_result; + struct convert_to_rgba5551_result rgba5551_result; struct convert_to_rgb888_result rgb888_result; struct convert_to_argb8888_result argb8888_result; struct convert_to_xrgb2101010_result xrgb2101010_result; @@ -85,6 +103,18 @@ static struct convert_xrgb8888_case convert_xrgb8888_cases[] = { .expected = { 0xF800 }, .expected_swab = { 0x00F8 }, }, + .xrgb1555_result = { + .dst_pitch = 0, + .expected = { 0x7C00 }, + }, + .argb1555_result = { + .dst_pitch = 0, + .expected = { 0xFC00 }, + }, + .rgba5551_result = { + .dst_pitch = 0, + .expected = { 0xF801 }, + }, .rgb888_result = { .dst_pitch = 0, .expected = { 0x00, 0x00, 0xFF }, @@ -123,6 +153,18 @@ static struct convert_xrgb8888_case convert_xrgb8888_cases[] = { .expected = { 0xF800 }, .expected_swab = { 0x00F8 }, }, + .xrgb1555_result = { + .dst_pitch = 0, + .expected = { 0x7C00 }, + }, + .argb1555_result = { + .dst_pitch = 0, + .expected = { 0xFC00 }, + }, + .rgba5551_result = { + .dst_pitch = 0, + .expected = { 0xF801 }, + }, .rgb888_result = { .dst_pitch = 0, .expected = { 0x00, 0x00, 0xFF }, @@ -188,6 +230,33 @@ static struct convert_xrgb8888_case convert_xrgb8888_cases[] = { 0xE0FF, 0xFF07, }, }, + .xrgb1555_result = { + .dst_pitch = 0, + .expected = { + 0x7FFF, 0x0000, + 0x7C00, 0x03E0, + 0x001F, 0x7C1F, + 0x7FE0, 0x03FF, + }, + }, + .argb1555_result = { + .dst_pitch = 0, + .expected = { + 0xFFFF, 0x8000, + 0xFC00, 0x83E0, + 0x801F, 0xFC1F, + 0xFFE0, 0x83FF, + }, + }, + .rgba5551_result = { + .dst_pitch = 0, + .expected = { + 0xFFFF, 0x0001, + 0xF801, 0x07C1, + 0x003F, 0xF83F, + 0xFFC1, 0x07FF, + }, + }, .rgb888_result = { .dst_pitch = 0, .expected = { @@ -264,6 +333,30 @@ static struct convert_xrgb8888_case convert_xrgb8888_cases[] = { 0x00A8, 0x8E6B, 0x330A, 0x0000, 0x0000, }, }, + .xrgb1555_result = { + .dst_pitch = 10, + .expected = { + 0x0513, 0x0920, 0x5400, 0x0000, 0x0000, + 0x35CE, 0x0513, 0x0920, 0x0000, 0x0000, + 0x5400, 0x35CE, 0x0513, 0x0000, 0x0000, + }, + }, + .argb1555_result = { + .dst_pitch = 10, + .expected = { + 0x8513, 0x8920, 0xD400, 0x0000, 0x0000, + 0xB5CE, 0x8513, 0x8920, 0x0000, 0x0000, + 0xD400, 0xB5CE, 0x8513, 0x0000, 0x0000, + }, + }, + .rgba5551_result = { + .dst_pitch = 10, + .expected = { + 0x0A27, 0x1241, 0xA801, 0x0000, 0x0000, + 0x6B9D, 0x0A27, 0x1241, 0x0000, 0x0000, + 0xA801, 0x6B9D, 0x0A27, 0x0000, 0x0000, + }, + }, .rgb888_result = { .dst_pitch = 15, .expected = { @@ -476,6 +569,99 @@ static void drm_test_fb_xrgb8888_to_rgb565(struct kunit *test) KUNIT_EXPECT_EQ(test, memcmp(buf, result->expected_swab, dst_size), 0); } +static void drm_test_fb_xrgb8888_to_xrgb1555(struct kunit *test) +{ + const struct convert_xrgb8888_case *params = test->param_value; + const struct convert_to_xrgb1555_result *result = ¶ms->xrgb1555_result; + size_t dst_size; + u16 *buf = NULL; + __le32 *xrgb8888 = NULL; + struct iosys_map dst, src; + + struct drm_framebuffer fb = { + .format = drm_format_info(DRM_FORMAT_XRGB8888), + .pitches = { params->pitch, 0, 0 }, + }; + + dst_size = conversion_buf_size(DRM_FORMAT_XRGB1555, result->dst_pitch, + ¶ms->clip); + KUNIT_ASSERT_GT(test, dst_size, 0); + + buf = kunit_kzalloc(test, dst_size, GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf); + iosys_map_set_vaddr(&dst, buf); + + xrgb8888 = cpubuf_to_le32(test, params->xrgb8888, TEST_BUF_SIZE); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xrgb8888); + iosys_map_set_vaddr(&src, xrgb8888); + + drm_fb_xrgb8888_to_xrgb1555(&dst, &result->dst_pitch, &src, &fb, ¶ms->clip); + buf = le16buf_to_cpu(test, (__force const __le16 *)buf, dst_size / sizeof(__le16)); + KUNIT_EXPECT_EQ(test, memcmp(buf, result->expected, dst_size), 0); +} + +static void drm_test_fb_xrgb8888_to_argb1555(struct kunit *test) +{ + const struct convert_xrgb8888_case *params = test->param_value; + const struct convert_to_argb1555_result *result = ¶ms->argb1555_result; + size_t dst_size; + u16 *buf = NULL; + __le32 *xrgb8888 = NULL; + struct iosys_map dst, src; + + struct drm_framebuffer fb = { + .format = drm_format_info(DRM_FORMAT_XRGB8888), + .pitches = { params->pitch, 0, 0 }, + }; + + dst_size = conversion_buf_size(DRM_FORMAT_ARGB1555, result->dst_pitch, + ¶ms->clip); + KUNIT_ASSERT_GT(test, dst_size, 0); + + buf = kunit_kzalloc(test, dst_size, GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf); + iosys_map_set_vaddr(&dst, buf); + + xrgb8888 = cpubuf_to_le32(test, params->xrgb8888, TEST_BUF_SIZE); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xrgb8888); + iosys_map_set_vaddr(&src, xrgb8888); + + drm_fb_xrgb8888_to_argb1555(&dst, &result->dst_pitch, &src, &fb, ¶ms->clip); + buf = le16buf_to_cpu(test, (__force const __le16 *)buf, dst_size / sizeof(__le16)); + KUNIT_EXPECT_EQ(test, memcmp(buf, result->expected, dst_size), 0); +} + +static void drm_test_fb_xrgb8888_to_rgba5551(struct kunit *test) +{ + const struct convert_xrgb8888_case *params = test->param_value; + const struct convert_to_rgba5551_result *result = ¶ms->rgba5551_result; + size_t dst_size; + u16 *buf = NULL; + __le32 *xrgb8888 = NULL; + struct iosys_map dst, src; + + struct drm_framebuffer fb = { + .format = drm_format_info(DRM_FORMAT_XRGB8888), + .pitches = { params->pitch, 0, 0 }, + }; + + dst_size = conversion_buf_size(DRM_FORMAT_RGBA5551, result->dst_pitch, + ¶ms->clip); + KUNIT_ASSERT_GT(test, dst_size, 0); + + buf = kunit_kzalloc(test, dst_size, GFP_KERNEL); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buf); + iosys_map_set_vaddr(&dst, buf); + + xrgb8888 = cpubuf_to_le32(test, params->xrgb8888, TEST_BUF_SIZE); + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, xrgb8888); + iosys_map_set_vaddr(&src, xrgb8888); + + drm_fb_xrgb8888_to_rgba5551(&dst, &result->dst_pitch, &src, &fb, ¶ms->clip); + buf = le16buf_to_cpu(test, (__force const __le16 *)buf, dst_size / sizeof(__le16)); + KUNIT_EXPECT_EQ(test, memcmp(buf, result->expected, dst_size), 0); +} + static void drm_test_fb_xrgb8888_to_rgb888(struct kunit *test) { const struct convert_xrgb8888_case *params = test->param_value; @@ -607,6 +793,9 @@ static struct kunit_case drm_format_helper_test_cases[] = { KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_gray8, convert_xrgb8888_gen_params), KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_rgb332, convert_xrgb8888_gen_params), KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_rgb565, convert_xrgb8888_gen_params), + KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_xrgb1555, convert_xrgb8888_gen_params), + KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_argb1555, convert_xrgb8888_gen_params), + KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_rgba5551, convert_xrgb8888_gen_params), KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_rgb888, convert_xrgb8888_gen_params), KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_argb8888, convert_xrgb8888_gen_params), KUNIT_CASE_PARAM(drm_test_fb_xrgb8888_to_xrgb2101010, convert_xrgb8888_gen_params), diff --git a/include/drm/drm_format_helper.h b/include/drm/drm_format_helper.h index 10b2d19cdb66..2d04f5863722 100644 --- a/include/drm/drm_format_helper.h +++ b/include/drm/drm_format_helper.h @@ -30,6 +30,15 @@ void drm_fb_xrgb8888_to_rgb332(struct iosys_map *dst, const unsigned int *dst_pi void drm_fb_xrgb8888_to_rgb565(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip, bool swab); +void drm_fb_xrgb8888_to_xrgb1555(struct iosys_map *dst, const unsigned int *dst_pitch, + const struct iosys_map *src, const struct drm_framebuffer *fb, + const struct drm_rect *clip); +void drm_fb_xrgb8888_to_argb1555(struct iosys_map *dst, const unsigned int *dst_pitch, + const struct iosys_map *src, const struct drm_framebuffer *fb, + const struct drm_rect *clip); +void drm_fb_xrgb8888_to_rgba5551(struct iosys_map *dst, const unsigned int *dst_pitch, + const struct iosys_map *src, const struct drm_framebuffer *fb, + const struct drm_rect *clip); void drm_fb_xrgb8888_to_rgb888(struct iosys_map *dst, const unsigned int *dst_pitch, const struct iosys_map *src, const struct drm_framebuffer *fb, const struct drm_rect *clip); -- cgit v1.2.3 From cff84bac99220029ca2e3fd974281cd760ca35c0 Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Mon, 2 Jan 2023 12:29:24 +0100 Subject: drm/fh-helper: Split fbdev single-probe helper Split the single-probe helper's implementation into multiple functions and get locking and overallocation out of the way of the surface setup. Simplifies later changes to the setup code. Signed-off-by: Thomas Zimmermann Reviewed-by: Javier Martinez Canillas Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-11-tzimmermann@suse.de --- drivers/gpu/drm/drm_fb_helper.c | 116 +++++++++++++++++++++++++--------------- 1 file changed, 73 insertions(+), 43 deletions(-) diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index b3a731b9170a..af1495394d38 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c @@ -1726,36 +1726,30 @@ unlock: } EXPORT_SYMBOL(drm_fb_helper_pan_display); -/* - * Allocates the backing storage and sets up the fbdev info structure through - * the ->fb_probe callback. - */ -static int drm_fb_helper_single_fb_probe(struct drm_fb_helper *fb_helper, - int preferred_bpp) + +static int __drm_fb_helper_find_sizes(struct drm_fb_helper *fb_helper, int preferred_bpp, + struct drm_fb_helper_surface_size *sizes) { struct drm_client_dev *client = &fb_helper->client; struct drm_device *dev = fb_helper->dev; - struct drm_mode_config *config = &dev->mode_config; - int ret = 0; int crtc_count = 0; struct drm_connector_list_iter conn_iter; - struct drm_fb_helper_surface_size sizes; struct drm_connector *connector; struct drm_mode_set *mode_set; int best_depth = 0; - memset(&sizes, 0, sizeof(struct drm_fb_helper_surface_size)); - sizes.surface_depth = 24; - sizes.surface_bpp = 32; - sizes.fb_width = (u32)-1; - sizes.fb_height = (u32)-1; + memset(sizes, 0, sizeof(struct drm_fb_helper_surface_size)); + sizes->surface_depth = 24; + sizes->surface_bpp = 32; + sizes->fb_width = (u32)-1; + sizes->fb_height = (u32)-1; /* * If driver picks 8 or 16 by default use that for both depth/bpp * to begin with */ - if (preferred_bpp != sizes.surface_bpp) - sizes.surface_depth = sizes.surface_bpp = preferred_bpp; + if (preferred_bpp != sizes->surface_bpp) + sizes->surface_depth = sizes->surface_bpp = preferred_bpp; drm_connector_list_iter_begin(fb_helper->dev, &conn_iter); drm_client_for_each_connector_iter(connector, &conn_iter) { @@ -1766,21 +1760,21 @@ static int drm_fb_helper_single_fb_probe(struct drm_fb_helper *fb_helper, if (cmdline_mode->bpp_specified) { switch (cmdline_mode->bpp) { case 8: - sizes.surface_depth = sizes.surface_bpp = 8; + sizes->surface_depth = sizes->surface_bpp = 8; break; case 15: - sizes.surface_depth = 15; - sizes.surface_bpp = 16; + sizes->surface_depth = 15; + sizes->surface_bpp = 16; break; case 16: - sizes.surface_depth = sizes.surface_bpp = 16; + sizes->surface_depth = sizes->surface_bpp = 16; break; case 24: - sizes.surface_depth = sizes.surface_bpp = 24; + sizes->surface_depth = sizes->surface_bpp = 24; break; case 32: - sizes.surface_depth = 24; - sizes.surface_bpp = 32; + sizes->surface_depth = 24; + sizes->surface_bpp = 32; break; } break; @@ -1793,7 +1787,6 @@ static int drm_fb_helper_single_fb_probe(struct drm_fb_helper *fb_helper, * supports RGBA5551 (16 bpp, depth 15) but not RGB565 (16 bpp, depth * 16) we need to scale down the depth of the sizes we request. */ - mutex_lock(&client->modeset_mutex); drm_client_for_each_modeset(mode_set, client) { struct drm_crtc *crtc = mode_set->crtc; struct drm_plane *plane = crtc->primary; @@ -1817,13 +1810,13 @@ static int drm_fb_helper_single_fb_probe(struct drm_fb_helper *fb_helper, continue; /* We found a perfect fit, great */ - if (fmt->depth == sizes.surface_depth) { + if (fmt->depth == sizes->surface_depth) { best_depth = fmt->depth; break; } /* Skip depths above what we're looking for */ - if (fmt->depth > sizes.surface_depth) + if (fmt->depth > sizes->surface_depth) continue; /* Best depth found so far */ @@ -1831,10 +1824,10 @@ static int drm_fb_helper_single_fb_probe(struct drm_fb_helper *fb_helper, best_depth = fmt->depth; } } - if (sizes.surface_depth != best_depth && best_depth) { + if (sizes->surface_depth != best_depth && best_depth) { drm_info(dev, "requested bpp %d, scaled depth down to %d", - sizes.surface_bpp, best_depth); - sizes.surface_depth = best_depth; + sizes->surface_bpp, best_depth); + sizes->surface_depth = best_depth; } /* first up get a count of crtcs now in use and new min/maxes width/heights */ @@ -1858,8 +1851,10 @@ static int drm_fb_helper_single_fb_probe(struct drm_fb_helper *fb_helper, x = mode_set->x; y = mode_set->y; - sizes.surface_width = max_t(u32, desired_mode->hdisplay + x, sizes.surface_width); - sizes.surface_height = max_t(u32, desired_mode->vdisplay + y, sizes.surface_height); + sizes->surface_width = + max_t(u32, desired_mode->hdisplay + x, sizes->surface_width); + sizes->surface_height = + max_t(u32, desired_mode->vdisplay + y, sizes->surface_height); for (j = 0; j < mode_set->num_connectors; j++) { struct drm_connector *connector = mode_set->connectors[j]; @@ -1875,28 +1870,63 @@ static int drm_fb_helper_single_fb_probe(struct drm_fb_helper *fb_helper, } if (lasth) - sizes.fb_width = min_t(u32, desired_mode->hdisplay + x, sizes.fb_width); + sizes->fb_width = min_t(u32, desired_mode->hdisplay + x, sizes->fb_width); if (lastv) - sizes.fb_height = min_t(u32, desired_mode->vdisplay + y, sizes.fb_height); + sizes->fb_height = min_t(u32, desired_mode->vdisplay + y, sizes->fb_height); } - mutex_unlock(&client->modeset_mutex); - if (crtc_count == 0 || sizes.fb_width == -1 || sizes.fb_height == -1) { + if (crtc_count == 0 || sizes->fb_width == -1 || sizes->fb_height == -1) { drm_info(dev, "Cannot find any crtc or sizes\n"); - - /* First time: disable all crtc's.. */ - if (!fb_helper->deferred_setup) - drm_client_modeset_commit(client); return -EAGAIN; } + return 0; +} + +static int drm_fb_helper_find_sizes(struct drm_fb_helper *fb_helper, int preferred_bpp, + struct drm_fb_helper_surface_size *sizes) +{ + struct drm_client_dev *client = &fb_helper->client; + struct drm_device *dev = fb_helper->dev; + struct drm_mode_config *config = &dev->mode_config; + int ret; + + mutex_lock(&client->modeset_mutex); + ret = __drm_fb_helper_find_sizes(fb_helper, preferred_bpp, sizes); + mutex_unlock(&client->modeset_mutex); + + if (ret) + return ret; + /* Handle our overallocation */ - sizes.surface_height *= drm_fbdev_overalloc; - sizes.surface_height /= 100; - if (sizes.surface_height > config->max_height) { + sizes->surface_height *= drm_fbdev_overalloc; + sizes->surface_height /= 100; + if (sizes->surface_height > config->max_height) { drm_dbg_kms(dev, "Fbdev over-allocation too large; clamping height to %d\n", config->max_height); - sizes.surface_height = config->max_height; + sizes->surface_height = config->max_height; + } + + return 0; +} + +/* + * Allocates the backing storage and sets up the fbdev info structure through + * the ->fb_probe callback. + */ +static int drm_fb_helper_single_fb_probe(struct drm_fb_helper *fb_helper, + int preferred_bpp) +{ + struct drm_client_dev *client = &fb_helper->client; + struct drm_fb_helper_surface_size sizes; + int ret; + + ret = drm_fb_helper_find_sizes(fb_helper, preferred_bpp, &sizes); + if (ret) { + /* First time: disable all crtc's.. */ + if (!fb_helper->deferred_setup) + drm_client_modeset_commit(client); + return ret; } #if IS_ENABLED(CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM) -- cgit v1.2.3 From 37c90d589dc06c1ae19b5eb4ed79e7a70ccc21bf Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Mon, 2 Jan 2023 12:29:25 +0100 Subject: drm/fb-helper: Fix single-probe color-format selection Fix the color-format selection of the single-probe helper. Go through all user-specified values and test each for compatibility with the driver. If none is supported, use the driver-provided default. This guarantees that the console is always available in any color format at least. Until now, the format selection of the single-probe helper tried to either use a user-specified format or a 32-bit default format. If the user-specified format was not supported by the driver, the selection failed and the display remained blank. Signed-off-by: Thomas Zimmermann Reviewed-by: Javier Martinez Canillas Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-12-tzimmermann@suse.de --- drivers/gpu/drm/drm_fb_helper.c | 172 ++++++++++++++++++++++------------------ 1 file changed, 94 insertions(+), 78 deletions(-) diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index af1495394d38..1369ca4ae39b 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c @@ -1726,6 +1726,70 @@ unlock: } EXPORT_SYMBOL(drm_fb_helper_pan_display); +static uint32_t drm_fb_helper_find_format(struct drm_fb_helper *fb_helper, const uint32_t *formats, + size_t format_count, uint32_t bpp, uint32_t depth) +{ + struct drm_device *dev = fb_helper->dev; + uint32_t format; + size_t i; + + /* + * Do not consider YUV or other complicated formats + * for framebuffers. This means only legacy formats + * are supported (fmt->depth is a legacy field), but + * the framebuffer emulation can only deal with such + * formats, specifically RGB/BGA formats. + */ + format = drm_mode_legacy_fb_format(bpp, depth); + if (!format) + goto err; + + for (i = 0; i < format_count; ++i) { + if (formats[i] == format) + return format; + } + +err: + /* We found nothing. */ + drm_warn(dev, "bpp/depth value of %u/%u not supported\n", bpp, depth); + + return DRM_FORMAT_INVALID; +} + +static uint32_t drm_fb_helper_find_cmdline_format(struct drm_fb_helper *fb_helper, + const uint32_t *formats, size_t format_count, + const struct drm_cmdline_mode *cmdline_mode) +{ + struct drm_device *dev = fb_helper->dev; + uint32_t bpp, depth; + + if (!cmdline_mode->bpp_specified) + return DRM_FORMAT_INVALID; + + switch (cmdline_mode->bpp) { + case 1: + case 2: + case 4: + case 8: + case 16: + case 24: + bpp = depth = cmdline_mode->bpp; + break; + case 15: + bpp = 16; + depth = 15; + break; + case 32: + bpp = 32; + depth = 24; + break; + default: + drm_info(dev, "unsupported bpp value of %d\n", cmdline_mode->bpp); + return DRM_FORMAT_INVALID; + } + + return drm_fb_helper_find_format(fb_helper, formats, format_count, bpp, depth); +} static int __drm_fb_helper_find_sizes(struct drm_fb_helper *fb_helper, int preferred_bpp, struct drm_fb_helper_surface_size *sizes) @@ -1736,100 +1800,52 @@ static int __drm_fb_helper_find_sizes(struct drm_fb_helper *fb_helper, int prefe struct drm_connector_list_iter conn_iter; struct drm_connector *connector; struct drm_mode_set *mode_set; - int best_depth = 0; + uint32_t surface_format = DRM_FORMAT_INVALID; + const struct drm_format_info *info; - memset(sizes, 0, sizeof(struct drm_fb_helper_surface_size)); - sizes->surface_depth = 24; - sizes->surface_bpp = 32; + memset(sizes, 0, sizeof(*sizes)); sizes->fb_width = (u32)-1; sizes->fb_height = (u32)-1; - /* - * If driver picks 8 or 16 by default use that for both depth/bpp - * to begin with - */ - if (preferred_bpp != sizes->surface_bpp) - sizes->surface_depth = sizes->surface_bpp = preferred_bpp; - - drm_connector_list_iter_begin(fb_helper->dev, &conn_iter); - drm_client_for_each_connector_iter(connector, &conn_iter) { - struct drm_cmdline_mode *cmdline_mode; - - cmdline_mode = &connector->cmdline_mode; - - if (cmdline_mode->bpp_specified) { - switch (cmdline_mode->bpp) { - case 8: - sizes->surface_depth = sizes->surface_bpp = 8; - break; - case 15: - sizes->surface_depth = 15; - sizes->surface_bpp = 16; - break; - case 16: - sizes->surface_depth = sizes->surface_bpp = 16; - break; - case 24: - sizes->surface_depth = sizes->surface_bpp = 24; - break; - case 32: - sizes->surface_depth = 24; - sizes->surface_bpp = 32; - break; - } - break; - } - } - drm_connector_list_iter_end(&conn_iter); - - /* - * If we run into a situation where, for example, the primary plane - * supports RGBA5551 (16 bpp, depth 15) but not RGB565 (16 bpp, depth - * 16) we need to scale down the depth of the sizes we request. - */ drm_client_for_each_modeset(mode_set, client) { struct drm_crtc *crtc = mode_set->crtc; struct drm_plane *plane = crtc->primary; - int j; drm_dbg_kms(dev, "test CRTC %u primary plane\n", drm_crtc_index(crtc)); - for (j = 0; j < plane->format_count; j++) { - const struct drm_format_info *fmt; - - fmt = drm_format_info(plane->format_types[j]); + drm_connector_list_iter_begin(fb_helper->dev, &conn_iter); + drm_client_for_each_connector_iter(connector, &conn_iter) { + struct drm_cmdline_mode *cmdline_mode = &connector->cmdline_mode; - /* - * Do not consider YUV or other complicated formats - * for framebuffers. This means only legacy formats - * are supported (fmt->depth is a legacy field) but - * the framebuffer emulation can only deal with such - * formats, specifically RGB/BGA formats. - */ - if (fmt->depth == 0) - continue; - - /* We found a perfect fit, great */ - if (fmt->depth == sizes->surface_depth) { - best_depth = fmt->depth; - break; - } + surface_format = drm_fb_helper_find_cmdline_format(fb_helper, + plane->format_types, + plane->format_count, + cmdline_mode); + if (surface_format != DRM_FORMAT_INVALID) + break; /* found supported format */ + } + drm_connector_list_iter_end(&conn_iter); - /* Skip depths above what we're looking for */ - if (fmt->depth > sizes->surface_depth) - continue; + if (surface_format != DRM_FORMAT_INVALID) + break; /* found supported format */ - /* Best depth found so far */ - if (fmt->depth > best_depth) - best_depth = fmt->depth; - } + /* try preferred bpp/depth */ + surface_format = drm_fb_helper_find_format(fb_helper, plane->format_types, + plane->format_count, preferred_bpp, + dev->mode_config.preferred_depth); + if (surface_format != DRM_FORMAT_INVALID) + break; /* found supported format */ } - if (sizes->surface_depth != best_depth && best_depth) { - drm_info(dev, "requested bpp %d, scaled depth down to %d", - sizes->surface_bpp, best_depth); - sizes->surface_depth = best_depth; + + if (surface_format == DRM_FORMAT_INVALID) { + drm_warn(dev, "No compatible format found\n"); + return -EAGAIN; } + info = drm_format_info(surface_format); + sizes->surface_bpp = drm_format_info_bpp(info, 0); + sizes->surface_depth = info->depth; + /* first up get a count of crtcs now in use and new min/maxes width/heights */ crtc_count = 0; drm_client_for_each_modeset(mode_set, client) { -- cgit v1.2.3 From 29fca6d56d76363368d012e18b5631340cfcd69c Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Mon, 2 Jan 2023 12:29:26 +0100 Subject: drm/format-helper: Simplify drm_fb_build_fourcc_list() The DRM helper drm_fb_build_fourcc_list() creates a list of color formats for primary planes of the generic drivers. Simplify the helper: - It used to mix and filter native and emulated formats as provided by the driver. Now the only emulated format is XRGB8888, which is required as fallback by legacy software. Drop support for emulating any other formats. - Also convert alpha formats to their non-alpha counterparts. Generic drivers don't support primary planes with alpha formats and some DTs incorrectly advertise alpha channels for non-alpha hardware. So only export non-alpha formats for primary planes. With the simplified helper, scrap format lists of the affected generic drivers. All they need is the firmware buffer's native format, from which the helper creates the list of color formats. Signed-off-by: Thomas Zimmermann Reviewed-by: Javier Martinez Canillas Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-13-tzimmermann@suse.de --- drivers/gpu/drm/drm_format_helper.c | 112 ++++++++++++++++++------------------ drivers/gpu/drm/tiny/ofdrm.c | 20 ------- drivers/gpu/drm/tiny/simpledrm.c | 21 ------- include/drm/drm_format_helper.h | 1 - 4 files changed, 57 insertions(+), 97 deletions(-) diff --git a/drivers/gpu/drm/drm_format_helper.c b/drivers/gpu/drm/drm_format_helper.c index d631627e6c39..0523f81e2445 100644 --- a/drivers/gpu/drm/drm_format_helper.c +++ b/drivers/gpu/drm/drm_format_helper.c @@ -1070,6 +1070,39 @@ void drm_fb_xrgb8888_to_mono(struct iosys_map *dst, const unsigned int *dst_pitc } EXPORT_SYMBOL(drm_fb_xrgb8888_to_mono); +static uint32_t drm_fb_nonalpha_fourcc(uint32_t fourcc) +{ + /* only handle formats with depth != 0 and alpha channel */ + switch (fourcc) { + case DRM_FORMAT_ARGB1555: + return DRM_FORMAT_XRGB1555; + case DRM_FORMAT_ABGR1555: + return DRM_FORMAT_XBGR1555; + case DRM_FORMAT_RGBA5551: + return DRM_FORMAT_RGBX5551; + case DRM_FORMAT_BGRA5551: + return DRM_FORMAT_BGRX5551; + case DRM_FORMAT_ARGB8888: + return DRM_FORMAT_XRGB8888; + case DRM_FORMAT_ABGR8888: + return DRM_FORMAT_XBGR8888; + case DRM_FORMAT_RGBA8888: + return DRM_FORMAT_RGBX8888; + case DRM_FORMAT_BGRA8888: + return DRM_FORMAT_BGRX8888; + case DRM_FORMAT_ARGB2101010: + return DRM_FORMAT_XRGB2101010; + case DRM_FORMAT_ABGR2101010: + return DRM_FORMAT_XBGR2101010; + case DRM_FORMAT_RGBA1010102: + return DRM_FORMAT_RGBX1010102; + case DRM_FORMAT_BGRA1010102: + return DRM_FORMAT_BGRX1010102; + } + + return fourcc; +} + static bool is_listed_fourcc(const uint32_t *fourccs, size_t nfourccs, uint32_t fourcc) { const uint32_t *fourccs_end = fourccs + nfourccs; @@ -1082,73 +1115,48 @@ static bool is_listed_fourcc(const uint32_t *fourccs, size_t nfourccs, uint32_t return false; } -static const uint32_t conv_from_xrgb8888[] = { - DRM_FORMAT_XRGB8888, - DRM_FORMAT_ARGB8888, - DRM_FORMAT_XRGB2101010, - DRM_FORMAT_ARGB2101010, - DRM_FORMAT_RGB565, - DRM_FORMAT_RGB888, -}; - -static const uint32_t conv_from_rgb565_888[] = { - DRM_FORMAT_XRGB8888, - DRM_FORMAT_ARGB8888, -}; - -static bool is_conversion_supported(uint32_t from, uint32_t to) -{ - switch (from) { - case DRM_FORMAT_XRGB8888: - case DRM_FORMAT_ARGB8888: - return is_listed_fourcc(conv_from_xrgb8888, ARRAY_SIZE(conv_from_xrgb8888), to); - case DRM_FORMAT_RGB565: - case DRM_FORMAT_RGB888: - return is_listed_fourcc(conv_from_rgb565_888, ARRAY_SIZE(conv_from_rgb565_888), to); - case DRM_FORMAT_XRGB2101010: - return to == DRM_FORMAT_ARGB2101010; - case DRM_FORMAT_ARGB2101010: - return to == DRM_FORMAT_XRGB2101010; - default: - return false; - } -} - /** * drm_fb_build_fourcc_list - Filters a list of supported color formats against * the device's native formats * @dev: DRM device * @native_fourccs: 4CC codes of natively supported color formats * @native_nfourccs: The number of entries in @native_fourccs - * @driver_fourccs: 4CC codes of all driver-supported color formats - * @driver_nfourccs: The number of entries in @driver_fourccs * @fourccs_out: Returns 4CC codes of supported color formats * @nfourccs_out: The number of available entries in @fourccs_out * * This function create a list of supported color format from natively - * supported formats and the emulated formats. + * supported formats and additional emulated formats. * At a minimum, most userspace programs expect at least support for * XRGB8888 on the primary plane. Devices that have to emulate the * format, and possibly others, can use drm_fb_build_fourcc_list() to * create a list of supported color formats. The returned list can * be handed over to drm_universal_plane_init() et al. Native formats - * will go before emulated formats. Other heuristics might be applied + * will go before emulated formats. Native formats with alpha channel + * will be replaced by such without, as primary planes usually don't + * support alpha. Other heuristics might be applied * to optimize the order. Formats near the beginning of the list are - * usually preferred over formats near the end of the list. Formats - * without conversion helpers will be skipped. New drivers should only - * pass in XRGB8888 and avoid exposing additional emulated formats. + * usually preferred over formats near the end of the list. * * Returns: * The number of color-formats 4CC codes returned in @fourccs_out. */ size_t drm_fb_build_fourcc_list(struct drm_device *dev, const u32 *native_fourccs, size_t native_nfourccs, - const u32 *driver_fourccs, size_t driver_nfourccs, u32 *fourccs_out, size_t nfourccs_out) { + /* + * XRGB8888 is the default fallback format for most of userspace + * and it's currently the only format that should be emulated for + * the primary plane. Only if there's ever another default fallback, + * it should be added here. + */ + static const uint32_t extra_fourccs[] = { + DRM_FORMAT_XRGB8888, + }; + static const size_t extra_nfourccs = ARRAY_SIZE(extra_fourccs); + u32 *fourccs = fourccs_out; const u32 *fourccs_end = fourccs_out + nfourccs_out; - uint32_t native_format = 0; size_t i; /* @@ -1156,7 +1164,12 @@ size_t drm_fb_build_fourcc_list(struct drm_device *dev, */ for (i = 0; i < native_nfourccs; ++i) { - u32 fourcc = native_fourccs[i]; + /* + * Several DTs, boot loaders and firmware report native + * alpha formats that are non-alpha formats instead. So + * replace alpha formats by non-alpha formats. + */ + u32 fourcc = drm_fb_nonalpha_fourcc(native_fourccs[i]); if (is_listed_fourcc(fourccs_out, fourccs - fourccs_out, fourcc)) { continue; /* skip duplicate entries */ @@ -1167,14 +1180,6 @@ size_t drm_fb_build_fourcc_list(struct drm_device *dev, drm_dbg_kms(dev, "adding native format %p4cc\n", &fourcc); - /* - * There should only be one native format with the current API. - * This API needs to be refactored to correctly support arbitrary - * sets of native formats, since it needs to report which native - * format to use for each emulated format. - */ - if (!native_format) - native_format = fourcc; *fourccs = fourcc; ++fourccs; } @@ -1183,17 +1188,14 @@ size_t drm_fb_build_fourcc_list(struct drm_device *dev, * The extra formats, emulated by the driver, go second. */ - for (i = 0; (i < driver_nfourccs) && (fourccs < fourccs_end); ++i) { - u32 fourcc = driver_fourccs[i]; + for (i = 0; (i < extra_nfourccs) && (fourccs < fourccs_end); ++i) { + u32 fourcc = extra_fourccs[i]; if (is_listed_fourcc(fourccs_out, fourccs - fourccs_out, fourcc)) { continue; /* skip duplicate and native entries */ } else if (fourccs == fourccs_end) { drm_warn(dev, "Ignoring emulated format %p4cc\n", &fourcc); continue; /* end of available output buffer */ - } else if (!is_conversion_supported(fourcc, native_format)) { - drm_dbg_kms(dev, "Unsupported emulated format %p4cc\n", &fourcc); - continue; /* format is not supported for conversion */ } drm_dbg_kms(dev, "adding emulated format %p4cc\n", &fourcc); diff --git a/drivers/gpu/drm/tiny/ofdrm.c b/drivers/gpu/drm/tiny/ofdrm.c index 33eefeba437c..39c5fd463fec 100644 --- a/drivers/gpu/drm/tiny/ofdrm.c +++ b/drivers/gpu/drm/tiny/ofdrm.c @@ -754,24 +754,6 @@ static void ofdrm_crtc_state_destroy(struct ofdrm_crtc_state *ofdrm_crtc_state) kfree(ofdrm_crtc_state); } -/* - * Support all formats of OF display and maybe more; in order - * of preference. The display's update function will do any - * conversion necessary. - * - * TODO: Add blit helpers for remaining formats and uncomment - * constants. - */ -static const uint32_t ofdrm_primary_plane_formats[] = { - DRM_FORMAT_XRGB8888, - DRM_FORMAT_RGB565, - //DRM_FORMAT_XRGB1555, - //DRM_FORMAT_C8, - /* Big-endian formats below */ - DRM_FORMAT_BGRX8888, - DRM_FORMAT_RGB565 | DRM_FORMAT_BIG_ENDIAN, -}; - static const uint64_t ofdrm_primary_plane_format_modifiers[] = { DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_MOD_INVALID @@ -1290,8 +1272,6 @@ static struct ofdrm_device *ofdrm_device_create(struct drm_driver *drv, /* Primary plane */ nformats = drm_fb_build_fourcc_list(dev, &format->format, 1, - ofdrm_primary_plane_formats, - ARRAY_SIZE(ofdrm_primary_plane_formats), odev->formats, ARRAY_SIZE(odev->formats)); primary_plane = &odev->primary_plane; diff --git a/drivers/gpu/drm/tiny/simpledrm.c b/drivers/gpu/drm/tiny/simpledrm.c index 30e928d627e8..7355617f38d3 100644 --- a/drivers/gpu/drm/tiny/simpledrm.c +++ b/drivers/gpu/drm/tiny/simpledrm.c @@ -446,25 +446,6 @@ static int simpledrm_device_init_regulators(struct simpledrm_device *sdev) * Modesetting */ -/* - * Support all formats of simplefb and maybe more; in order - * of preference. The display's update function will do any - * conversion necessary. - * - * TODO: Add blit helpers for remaining formats and uncomment - * constants. - */ -static const uint32_t simpledrm_primary_plane_formats[] = { - DRM_FORMAT_XRGB8888, - DRM_FORMAT_ARGB8888, - DRM_FORMAT_RGB565, - //DRM_FORMAT_XRGB1555, - //DRM_FORMAT_ARGB1555, - DRM_FORMAT_RGB888, - DRM_FORMAT_XRGB2101010, - DRM_FORMAT_ARGB2101010, -}; - static const uint64_t simpledrm_primary_plane_format_modifiers[] = { DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_MOD_INVALID @@ -745,8 +726,6 @@ static struct simpledrm_device *simpledrm_device_create(struct drm_driver *drv, /* Primary plane */ nformats = drm_fb_build_fourcc_list(dev, &format->format, 1, - simpledrm_primary_plane_formats, - ARRAY_SIZE(simpledrm_primary_plane_formats), sdev->formats, ARRAY_SIZE(sdev->formats)); primary_plane = &sdev->primary_plane; diff --git a/include/drm/drm_format_helper.h b/include/drm/drm_format_helper.h index 2d04f5863722..291deb09475b 100644 --- a/include/drm/drm_format_helper.h +++ b/include/drm/drm_format_helper.h @@ -65,7 +65,6 @@ void drm_fb_xrgb8888_to_mono(struct iosys_map *dst, const unsigned int *dst_pitc size_t drm_fb_build_fourcc_list(struct drm_device *dev, const u32 *native_fourccs, size_t native_nfourccs, - const u32 *extra_fourccs, size_t extra_nfourccs, u32 *fourccs_out, size_t nfourccs_out); #endif /* __LINUX_DRM_FORMAT_HELPER_H */ -- cgit v1.2.3 From fe91e41a6170c9fd73fa0bf9a1a3f3cc6ee5c1d2 Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Mon, 2 Jan 2023 12:29:27 +0100 Subject: drm/format-helper: Remove unnecessary conversion helpers Drivers only emulate XRGB8888 framebuffers. Remove all conversion helpers that do not use XRGB8888 as their source format. Also remove some special cases for alpha formats in the blit helper. Signed-off-by: Thomas Zimmermann Reviewed-by: Javier Martinez Canillas Link: https://patchwork.freedesktop.org/patch/msgid/20230102112927.26565-14-tzimmermann@suse.de --- drivers/gpu/drm/drm_format_helper.c | 75 ------------------------------------- 1 file changed, 75 deletions(-) diff --git a/drivers/gpu/drm/drm_format_helper.c b/drivers/gpu/drm/drm_format_helper.c index 0523f81e2445..994f8fb71f45 100644 --- a/drivers/gpu/drm/drm_format_helper.c +++ b/drivers/gpu/drm/drm_format_helper.c @@ -649,65 +649,6 @@ void drm_fb_xrgb8888_to_argb8888(struct iosys_map *dst, const unsigned int *dst_ } EXPORT_SYMBOL(drm_fb_xrgb8888_to_argb8888); -static void drm_fb_rgb565_to_xrgb8888_line(void *dbuf, const void *sbuf, unsigned int pixels) -{ - __le32 *dbuf32 = dbuf; - const __le16 *sbuf16 = sbuf; - unsigned int x; - - for (x = 0; x < pixels; x++) { - u16 val16 = le16_to_cpu(sbuf16[x]); - u32 val32 = ((val16 & 0xf800) << 8) | - ((val16 & 0x07e0) << 5) | - ((val16 & 0x001f) << 3); - val32 = 0xff000000 | val32 | - ((val32 >> 3) & 0x00070007) | - ((val32 >> 2) & 0x00000300); - dbuf32[x] = cpu_to_le32(val32); - } -} - -static void drm_fb_rgb565_to_xrgb8888(struct iosys_map *dst, const unsigned int *dst_pitch, - const struct iosys_map *src, - const struct drm_framebuffer *fb, - const struct drm_rect *clip) -{ - static const u8 dst_pixsize[DRM_FORMAT_MAX_PLANES] = { - 4, - }; - - drm_fb_xfrm(dst, dst_pitch, dst_pixsize, src, fb, clip, false, - drm_fb_rgb565_to_xrgb8888_line); -} - -static void drm_fb_rgb888_to_xrgb8888_line(void *dbuf, const void *sbuf, unsigned int pixels) -{ - __le32 *dbuf32 = dbuf; - const u8 *sbuf8 = sbuf; - unsigned int x; - - for (x = 0; x < pixels; x++) { - u8 r = *sbuf8++; - u8 g = *sbuf8++; - u8 b = *sbuf8++; - u32 pix = 0xff000000 | (r << 16) | (g << 8) | b; - dbuf32[x] = cpu_to_le32(pix); - } -} - -static void drm_fb_rgb888_to_xrgb8888(struct iosys_map *dst, const unsigned int *dst_pitch, - const struct iosys_map *src, - const struct drm_framebuffer *fb, - const struct drm_rect *clip) -{ - static const u8 dst_pixsize[DRM_FORMAT_MAX_PLANES] = { - 4, - }; - - drm_fb_xfrm(dst, dst_pitch, dst_pixsize, src, fb, clip, false, - drm_fb_rgb888_to_xrgb8888_line); -} - static void drm_fb_xrgb8888_to_xrgb2101010_line(void *dbuf, const void *sbuf, unsigned int pixels) { __le32 *dbuf32 = dbuf; @@ -899,12 +840,6 @@ int drm_fb_blit(struct iosys_map *dst, const unsigned int *dst_pitch, uint32_t d { uint32_t fb_format = fb->format->format; - /* treat alpha channel like filler bits */ - if (fb_format == DRM_FORMAT_ARGB8888) - fb_format = DRM_FORMAT_XRGB8888; - if (fb_format == DRM_FORMAT_ARGB2101010) - fb_format = DRM_FORMAT_XRGB2101010; - if (fb_format == dst_format) { drm_fb_memcpy(dst, dst_pitch, src, fb, clip); return 0; @@ -943,16 +878,6 @@ int drm_fb_blit(struct iosys_map *dst, const unsigned int *dst_pitch, uint32_t d drm_fb_swab(dst, dst_pitch, src, fb, clip, false); return 0; } - } else if (fb_format == DRM_FORMAT_RGB888) { - if (dst_format == DRM_FORMAT_XRGB8888) { - drm_fb_rgb888_to_xrgb8888(dst, dst_pitch, src, fb, clip); - return 0; - } - } else if (fb_format == DRM_FORMAT_RGB565) { - if (dst_format == DRM_FORMAT_XRGB8888) { - drm_fb_rgb565_to_xrgb8888(dst, dst_pitch, src, fb, clip); - return 0; - } } drm_warn_once(fb->dev, "No conversion helper from %p4cc to %p4cc found.\n", -- cgit v1.2.3 From 723dad977acd1bd37f87e88d430958a833491ff1 Mon Sep 17 00:00:00 2001 From: Tvrtko Ursulin Date: Fri, 23 Dec 2022 11:23:02 +0000 Subject: drm: Replace DRM_DEBUG with drm_dbg_core in file and ioctl handling MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace the deprecated macro with the per-device one. Signed-off-by: Tvrtko Ursulin Acked-by: Christian König Reviewed-by: Simon Ser Signed-off-by: Simon Ser Link: https://patchwork.freedesktop.org/patch/msgid/20221223112302.320097-1-tvrtko.ursulin@linux.intel.com --- drivers/gpu/drm/drm_file.c | 18 +++++++++--------- drivers/gpu/drm/drm_ioc32.c | 13 +++++++------ drivers/gpu/drm/drm_ioctl.c | 25 +++++++++++++------------ 3 files changed, 29 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/drm_file.c b/drivers/gpu/drm/drm_file.c index a8b4d918e9a3..ffd38e494336 100644 --- a/drivers/gpu/drm/drm_file.c +++ b/drivers/gpu/drm/drm_file.c @@ -245,10 +245,10 @@ void drm_file_free(struct drm_file *file) dev = file->minor->dev; - DRM_DEBUG("comm=\"%s\", pid=%d, dev=0x%lx, open_count=%d\n", - current->comm, task_pid_nr(current), - (long)old_encode_dev(file->minor->kdev->devt), - atomic_read(&dev->open_count)); + drm_dbg_core(dev, "comm=\"%s\", pid=%d, dev=0x%lx, open_count=%d\n", + current->comm, task_pid_nr(current), + (long)old_encode_dev(file->minor->kdev->devt), + atomic_read(&dev->open_count)); #ifdef CONFIG_DRM_LEGACY if (drm_core_check_feature(dev, DRIVER_LEGACY) && @@ -340,8 +340,8 @@ static int drm_open_helper(struct file *filp, struct drm_minor *minor) dev->switch_power_state != DRM_SWITCH_POWER_DYNAMIC_OFF) return -EINVAL; - DRM_DEBUG("comm=\"%s\", pid=%d, minor=%d\n", current->comm, - task_pid_nr(current), minor->index); + drm_dbg_core(dev, "comm=\"%s\", pid=%d, minor=%d\n", + current->comm, task_pid_nr(current), minor->index); priv = drm_file_alloc(minor); if (IS_ERR(priv)) @@ -450,11 +450,11 @@ EXPORT_SYMBOL(drm_open); void drm_lastclose(struct drm_device * dev) { - DRM_DEBUG("\n"); + drm_dbg_core(dev, "\n"); if (dev->driver->lastclose) dev->driver->lastclose(dev); - DRM_DEBUG("driver lastclose completed\n"); + drm_dbg_core(dev, "driver lastclose completed\n"); if (drm_core_check_feature(dev, DRIVER_LEGACY)) drm_legacy_dev_reinit(dev); @@ -485,7 +485,7 @@ int drm_release(struct inode *inode, struct file *filp) if (drm_dev_needs_global_mutex(dev)) mutex_lock(&drm_global_mutex); - DRM_DEBUG("open_count = %d\n", atomic_read(&dev->open_count)); + drm_dbg_core(dev, "open_count = %d\n", atomic_read(&dev->open_count)); drm_close_helper(filp); diff --git a/drivers/gpu/drm/drm_ioc32.c b/drivers/gpu/drm/drm_ioc32.c index 5d82891c3222..49a743f62b4a 100644 --- a/drivers/gpu/drm/drm_ioc32.c +++ b/drivers/gpu/drm/drm_ioc32.c @@ -972,6 +972,7 @@ long drm_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) { unsigned int nr = DRM_IOCTL_NR(cmd); struct drm_file *file_priv = filp->private_data; + struct drm_device *dev = file_priv->minor->dev; drm_ioctl_compat_t *fn; int ret; @@ -986,14 +987,14 @@ long drm_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) if (!fn) return drm_ioctl(filp, cmd, arg); - DRM_DEBUG("comm=\"%s\", pid=%d, dev=0x%lx, auth=%d, %s\n", - current->comm, task_pid_nr(current), - (long)old_encode_dev(file_priv->minor->kdev->devt), - file_priv->authenticated, - drm_compat_ioctls[nr].name); + drm_dbg_core(dev, "comm=\"%s\", pid=%d, dev=0x%lx, auth=%d, %s\n", + current->comm, task_pid_nr(current), + (long)old_encode_dev(file_priv->minor->kdev->devt), + file_priv->authenticated, + drm_compat_ioctls[nr].name); ret = (*fn)(filp, cmd, arg); if (ret) - DRM_DEBUG("ret = %d\n", ret); + drm_dbg_core(dev, "ret = %d\n", ret); return ret; } EXPORT_SYMBOL(drm_compat_ioctl); diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c index ca2a6e6101dc..7c9d66ee917d 100644 --- a/drivers/gpu/drm/drm_ioctl.c +++ b/drivers/gpu/drm/drm_ioctl.c @@ -440,7 +440,7 @@ done: int drm_noop(struct drm_device *dev, void *data, struct drm_file *file_priv) { - DRM_DEBUG("\n"); + drm_dbg_core(dev, "\n"); return 0; } EXPORT_SYMBOL(drm_noop); @@ -856,16 +856,16 @@ long drm_ioctl(struct file *filp, out_size = 0; ksize = max(max(in_size, out_size), drv_size); - DRM_DEBUG("comm=\"%s\" pid=%d, dev=0x%lx, auth=%d, %s\n", - current->comm, task_pid_nr(current), - (long)old_encode_dev(file_priv->minor->kdev->devt), - file_priv->authenticated, ioctl->name); + drm_dbg_core(dev, "comm=\"%s\" pid=%d, dev=0x%lx, auth=%d, %s\n", + current->comm, task_pid_nr(current), + (long)old_encode_dev(file_priv->minor->kdev->devt), + file_priv->authenticated, ioctl->name); /* Do not trust userspace, use our own definition */ func = ioctl->func; if (unlikely(!func)) { - DRM_DEBUG("no function\n"); + drm_dbg_core(dev, "no function\n"); retcode = -EINVAL; goto err_i1; } @@ -894,16 +894,17 @@ long drm_ioctl(struct file *filp, err_i1: if (!ioctl) - DRM_DEBUG("invalid ioctl: comm=\"%s\", pid=%d, dev=0x%lx, auth=%d, cmd=0x%02x, nr=0x%02x\n", - current->comm, task_pid_nr(current), - (long)old_encode_dev(file_priv->minor->kdev->devt), - file_priv->authenticated, cmd, nr); + drm_dbg_core(dev, + "invalid ioctl: comm=\"%s\", pid=%d, dev=0x%lx, auth=%d, cmd=0x%02x, nr=0x%02x\n", + current->comm, task_pid_nr(current), + (long)old_encode_dev(file_priv->minor->kdev->devt), + file_priv->authenticated, cmd, nr); if (kdata != stack_kdata) kfree(kdata); if (retcode) - DRM_DEBUG("comm=\"%s\", pid=%d, ret=%d\n", current->comm, - task_pid_nr(current), retcode); + drm_dbg_core(dev, "comm=\"%s\", pid=%d, ret=%d\n", + current->comm, task_pid_nr(current), retcode); return retcode; } EXPORT_SYMBOL(drm_ioctl); -- cgit v1.2.3 From a53be8dae86fe5d3567db245177e814e58210632 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ma=C3=ADra=20Canal?= Date: Tue, 27 Dec 2022 17:00:11 -0300 Subject: drm/v3d: replace open-coded implementation of drm_gem_object_lookup MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As v3d_submit_tfu_ioctl() performs the same steps as drm_gem_object_lookup(), replace the open-code implementation in v3d with its DRM core equivalent. Signed-off-by: Maíra Canal Reviewed-by: Melissa Wen Signed-off-by: Melissa Wen Link: https://patchwork.freedesktop.org/patch/msgid/20221227200010.191351-1-mcanal@igalia.com --- drivers/gpu/drm/v3d/v3d_gem.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/gpu/drm/v3d/v3d_gem.c b/drivers/gpu/drm/v3d/v3d_gem.c index 6e152ef26358..5da1806f3969 100644 --- a/drivers/gpu/drm/v3d/v3d_gem.c +++ b/drivers/gpu/drm/v3d/v3d_gem.c @@ -861,7 +861,6 @@ v3d_submit_tfu_ioctl(struct drm_device *dev, void *data, job->args = *args; - spin_lock(&file_priv->table_lock); for (job->base.bo_count = 0; job->base.bo_count < ARRAY_SIZE(args->bo_handles); job->base.bo_count++) { @@ -870,20 +869,16 @@ v3d_submit_tfu_ioctl(struct drm_device *dev, void *data, if (!args->bo_handles[job->base.bo_count]) break; - bo = idr_find(&file_priv->object_idr, - args->bo_handles[job->base.bo_count]); + bo = drm_gem_object_lookup(file_priv, args->bo_handles[job->base.bo_count]); if (!bo) { DRM_DEBUG("Failed to look up GEM BO %d: %d\n", job->base.bo_count, args->bo_handles[job->base.bo_count]); ret = -ENOENT; - spin_unlock(&file_priv->table_lock); goto fail; } - drm_gem_object_get(bo); job->base.bo[job->base.bo_count] = bo; } - spin_unlock(&file_priv->table_lock); ret = v3d_lock_bo_reservations(&job->base, &acquire_ctx); if (ret) -- cgit v1.2.3 From 51342cc021400841b461cc579f76db24cdb482fc Mon Sep 17 00:00:00 2001 From: Sean Paul Date: Tue, 3 Jan 2023 15:27:38 +0000 Subject: drm/docs: Explicitly document default CRTC background behavior Add a paragraph explaining that the default behavior for areas which are not covered by planes or where planes are blending with the CRTC background, is black. This is alluded to in the "pixel blend mode" property docs, but not called out explicitly. Reviewed-by: Simon Ser Signed-off-by: Sean Paul Link: https://patchwork.freedesktop.org/patch/msgid/20230103152738.1213785-1-sean@poorly.run --- drivers/gpu/drm/drm_plane.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c index 33357629a7f5..24e7998d1731 100644 --- a/drivers/gpu/drm/drm_plane.c +++ b/drivers/gpu/drm/drm_plane.c @@ -46,6 +46,11 @@ * properties that specify how the pixels are positioned and blended, like * rotation or Z-position. All these properties are stored in &drm_plane_state. * + * Unless explicitly specified (via CRTC property or otherwise), the active area + * of a CRTC will be black by default. This means portions of the active area + * which are not covered by a plane will be black, and alpha blending of any + * planes with the CRTC background will blend with black at the lowest zpos. + * * To create a plane, a KMS drivers allocates and zeroes an instances of * &struct drm_plane (possibly as part of a larger structure) and registers it * with a call to drm_universal_plane_init(). -- cgit v1.2.3 From 8dd4e8c49efc5a7a3879e117e4aa58082734506e Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Mon, 2 Jan 2023 13:01:23 +0100 Subject: drm/bridge: panel: Prevent ERR_PTR Dereference Commit 5ea6b1702781 ("drm/panel: Add prepare_prev_first flag to drm_panel") introduced an access to the bridge pointer in the devm_drm_panel_bridge_add_typed() function. However, due to the unusual ERR_PTR check when getting that pointer, the pointer access is done even though the pointer might be an error pointer. Rework the function for a more traditional design that will return immediately if it gets an ERR_PTR so that we never access the pointer in that case. Fixes: 5ea6b1702781 ("drm/panel: Add prepare_prev_first flag to drm_panel") Reported-by: kernel test robot Reported-by: Dan Carpenter Reviewed-by: Laurent Pinchart Reviewed-by: Andrzej Hajda Signed-off-by: Maxime Ripard Link: https://patchwork.freedesktop.org/patch/msgid/20230102120123.19062-1-maxime@cerno.tech Link: https://patchwork.freedesktop.org/patch/msgid/20230102120123.19062-1-maxime@cerno.tech --- drivers/gpu/drm/bridge/panel.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/panel.c b/drivers/gpu/drm/bridge/panel.c index 1708098fba6d..e8aae3cdc73d 100644 --- a/drivers/gpu/drm/bridge/panel.c +++ b/drivers/gpu/drm/bridge/panel.c @@ -357,15 +357,16 @@ struct drm_bridge *devm_drm_panel_bridge_add_typed(struct device *dev, return ERR_PTR(-ENOMEM); bridge = drm_panel_bridge_add_typed(panel, connector_type); - if (!IS_ERR(bridge)) { - *ptr = bridge; - devres_add(dev, ptr); - } else { + if (IS_ERR(bridge)) { devres_free(ptr); + return bridge; } bridge->pre_enable_prev_first = panel->prepare_prev_first; + *ptr = bridge; + devres_add(dev, ptr); + return bridge; } EXPORT_SYMBOL(devm_drm_panel_bridge_add_typed); -- cgit v1.2.3 From b357e7ac1b7349befaeded273b775c7af23a538b Mon Sep 17 00:00:00 2001 From: Daniel Vetter Date: Wed, 23 Nov 2022 20:24:37 +0100 Subject: drm/fourcc: Document open source user waiver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It's a bit a FAQ, and we really can't claim to be the authoritative source for allocating these numbers used in many standard extensions if we tell closed source or vendor stacks in general to go away. Iirc this was already clarified in some vulkan discussions, but I can't find that anywhere anymore. At least not in a public link. Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Thomas Zimmermann Cc: David Airlie Cc: Daniel Vetter Cc: Alex Deucher Cc: Daniel Stone Cc: Bas Nieuwenhuizen Cc: Jason Ekstrand Cc: Neil Trevett Acked-by: Daniel Stone Acked-by: Maxime Ripard Acked-by: David Airlie Acked-by: Marek Olšák Acked-by: Bas Nieuwenhuizen Acked-by: Jason Ekstrand Signed-off-by: Daniel Vetter Link: https://patchwork.freedesktop.org/patch/msgid/20221123192437.1065826-1-daniel.vetter@ffwll.ch --- include/uapi/drm/drm_fourcc.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index bc056f2d537d..de703c6be969 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -88,6 +88,18 @@ extern "C" { * * The authoritative list of format modifier codes is found in * `include/uapi/drm/drm_fourcc.h` + * + * Open Source User Waiver + * ----------------------- + * + * Because this is the authoritative source for pixel formats and modifiers + * referenced by GL, Vulkan extensions and other standards and hence used both + * by open source and closed source driver stacks, the usual requirement for an + * upstream in-kernel or open source userspace user does not apply. + * + * To ensure, as much as feasible, compatibility across stacks and avoid + * confusion with incompatible enumerations stakeholders for all relevant driver + * stacks should approve additions. */ #define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \ -- cgit v1.2.3 From 78b991ccfa64a438e2d8c2997d22d55621ab277d Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 2 Nov 2022 21:06:59 +0300 Subject: drm/poll-helper: merge drm_kms_helper_poll_disable() and _fini() Merge drm_kms_helper_poll_disable() and drm_kms_helper_poll_fini() code into a common helper function. Signed-off-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Signed-off-by: Neil Armstrong Link: https://patchwork.freedesktop.org/patch/msgid/20221102180705.459294-2-dmitry.baryshkov@linaro.org --- drivers/gpu/drm/drm_probe_helper.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/drm_probe_helper.c b/drivers/gpu/drm/drm_probe_helper.c index 1ea053cef557..d07ad4c5696b 100644 --- a/drivers/gpu/drm/drm_probe_helper.c +++ b/drivers/gpu/drm/drm_probe_helper.c @@ -802,6 +802,17 @@ bool drm_kms_helper_is_poll_worker(void) } EXPORT_SYMBOL(drm_kms_helper_is_poll_worker); +static void drm_kms_helper_poll_disable_fini(struct drm_device *dev, bool fini) +{ + if (!dev->mode_config.poll_enabled) + return; + + if (fini) + dev->mode_config.poll_enabled = false; + + cancel_delayed_work_sync(&dev->mode_config.output_poll_work); +} + /** * drm_kms_helper_poll_disable - disable output polling * @dev: drm_device @@ -818,9 +829,7 @@ EXPORT_SYMBOL(drm_kms_helper_is_poll_worker); */ void drm_kms_helper_poll_disable(struct drm_device *dev) { - if (!dev->mode_config.poll_enabled) - return; - cancel_delayed_work_sync(&dev->mode_config.output_poll_work); + drm_kms_helper_poll_disable_fini(dev, false); } EXPORT_SYMBOL(drm_kms_helper_poll_disable); @@ -858,11 +867,7 @@ EXPORT_SYMBOL(drm_kms_helper_poll_init); */ void drm_kms_helper_poll_fini(struct drm_device *dev) { - if (!dev->mode_config.poll_enabled) - return; - - dev->mode_config.poll_enabled = false; - cancel_delayed_work_sync(&dev->mode_config.output_poll_work); + drm_kms_helper_poll_disable_fini(dev, true); } EXPORT_SYMBOL(drm_kms_helper_poll_fini); -- cgit v1.2.3 From c8268795c9a9cc7be50f78d4502fad83a2a4f8df Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 2 Nov 2022 21:07:00 +0300 Subject: drm/probe-helper: enable and disable HPD on connectors Introduce two drm_connector_helper_funcs: enable_hpd() and disable_hpd(). They are called by drm_kms_helper_poll_enable() and drm_kms_helper_poll_disable() (and thus drm_kms_helper_poll_init() and drm_kms_helper_poll_fini()) respectively. This allows DRM drivers to rely on drm_kms_helper_poll for enabling and disabling HPD detection rather than doing that manually. Signed-off-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Signed-off-by: Neil Armstrong Link: https://patchwork.freedesktop.org/patch/msgid/20221102180705.459294-3-dmitry.baryshkov@linaro.org --- drivers/gpu/drm/drm_probe_helper.c | 19 +++++++++++++++++++ include/drm/drm_modeset_helper_vtables.h | 22 ++++++++++++++++++++++ 2 files changed, 41 insertions(+) diff --git a/drivers/gpu/drm/drm_probe_helper.c b/drivers/gpu/drm/drm_probe_helper.c index d07ad4c5696b..7973f2589ced 100644 --- a/drivers/gpu/drm/drm_probe_helper.c +++ b/drivers/gpu/drm/drm_probe_helper.c @@ -250,6 +250,12 @@ void drm_kms_helper_poll_enable(struct drm_device *dev) drm_connector_list_iter_begin(dev, &conn_iter); drm_for_each_connector_iter(connector, &conn_iter) { + const struct drm_connector_helper_funcs *funcs = + connector->helper_private; + + if (funcs && funcs->enable_hpd) + funcs->enable_hpd(connector); + if (connector->polled & (DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT)) poll = true; @@ -804,12 +810,25 @@ EXPORT_SYMBOL(drm_kms_helper_is_poll_worker); static void drm_kms_helper_poll_disable_fini(struct drm_device *dev, bool fini) { + struct drm_connector *connector; + struct drm_connector_list_iter conn_iter; + if (!dev->mode_config.poll_enabled) return; if (fini) dev->mode_config.poll_enabled = false; + drm_connector_list_iter_begin(dev, &conn_iter); + drm_for_each_connector_iter(connector, &conn_iter) { + const struct drm_connector_helper_funcs *funcs = + connector->helper_private; + + if (funcs && funcs->disable_hpd) + funcs->disable_hpd(connector); + } + drm_connector_list_iter_end(&conn_iter); + cancel_delayed_work_sync(&dev->mode_config.output_poll_work); } diff --git a/include/drm/drm_modeset_helper_vtables.h b/include/drm/drm_modeset_helper_vtables.h index d9f2254a039a..77a540ad7dcd 100644 --- a/include/drm/drm_modeset_helper_vtables.h +++ b/include/drm/drm_modeset_helper_vtables.h @@ -1143,6 +1143,28 @@ struct drm_connector_helper_funcs { */ void (*cleanup_writeback_job)(struct drm_writeback_connector *connector, struct drm_writeback_job *job); + + /** + * @enable_hpd: + * + * Enable hot-plug detection for the connector. + * + * This operation is optional. + * + * This callback is used by the drm_kms_helper_poll_enable() helpers. + */ + void (*enable_hpd)(struct drm_connector *connector); + + /** + * @disable_hpd: + * + * Disable hot-plug detection for the connector. + * + * This operation is optional. + * + * This callback is used by the drm_kms_helper_poll_disable() helpers. + */ + void (*disable_hpd)(struct drm_connector *connector); }; /** -- cgit v1.2.3 From 92d755d8f13b6791c72d4e980c09f054d8175c94 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 2 Nov 2022 21:07:01 +0300 Subject: drm/bridge_connector: rely on drm_kms_helper_poll_* for HPD enablement Use drm_connector's helpers enable_hpd and disable_hpd to enable and disable HPD automatically by the means of drm_kms_helper_poll_* functions. As the drm_bridge_connector_enable_hpd() and drm_bridge_connector_disable_hpd() functions are now unused, replace them with stubs to ease driver migration. Enabling the HPD from drm_bridge_connector_init() can happen too early, before the driver is prepared to handle HPD events. As the drm_bridge_connector_enable_hpd() is empty anyway, drop this call anyway. Signed-off-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Signed-off-by: Neil Armstrong Link: https://patchwork.freedesktop.org/patch/msgid/20221102180705.459294-4-dmitry.baryshkov@linaro.org --- drivers/gpu/drm/drm_bridge_connector.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/drm_bridge_connector.c b/drivers/gpu/drm/drm_bridge_connector.c index 1c7d936523df..0e13bc87a6ac 100644 --- a/drivers/gpu/drm/drm_bridge_connector.c +++ b/drivers/gpu/drm/drm_bridge_connector.c @@ -136,6 +136,11 @@ static void drm_bridge_connector_hpd_cb(void *cb_data, * This is typically used by display drivers in their resume handler. */ void drm_bridge_connector_enable_hpd(struct drm_connector *connector) +{ +} +EXPORT_SYMBOL_GPL(drm_bridge_connector_enable_hpd); + +static void _drm_bridge_connector_enable_hpd(struct drm_connector *connector) { struct drm_bridge_connector *bridge_connector = to_drm_bridge_connector(connector); @@ -145,7 +150,6 @@ void drm_bridge_connector_enable_hpd(struct drm_connector *connector) drm_bridge_hpd_enable(hpd, drm_bridge_connector_hpd_cb, bridge_connector); } -EXPORT_SYMBOL_GPL(drm_bridge_connector_enable_hpd); /** * drm_bridge_connector_disable_hpd - Disable hot-plug detection for the @@ -156,6 +160,11 @@ EXPORT_SYMBOL_GPL(drm_bridge_connector_enable_hpd); * This is typically used by display drivers in their suspend handler. */ void drm_bridge_connector_disable_hpd(struct drm_connector *connector) +{ +} +EXPORT_SYMBOL_GPL(drm_bridge_connector_disable_hpd); + +static void _drm_bridge_connector_disable_hpd(struct drm_connector *connector) { struct drm_bridge_connector *bridge_connector = to_drm_bridge_connector(connector); @@ -164,7 +173,6 @@ void drm_bridge_connector_disable_hpd(struct drm_connector *connector) if (hpd) drm_bridge_hpd_disable(hpd); } -EXPORT_SYMBOL_GPL(drm_bridge_connector_disable_hpd); /* ----------------------------------------------------------------------------- * Bridge Connector Functions @@ -305,6 +313,8 @@ static int drm_bridge_connector_get_modes(struct drm_connector *connector) static const struct drm_connector_helper_funcs drm_bridge_connector_helper_funcs = { .get_modes = drm_bridge_connector_get_modes, /* No need for .mode_valid(), the bridges are checked by the core. */ + .enable_hpd = _drm_bridge_connector_enable_hpd, + .disable_hpd = _drm_bridge_connector_disable_hpd, }; /* ----------------------------------------------------------------------------- @@ -387,10 +397,8 @@ struct drm_connector *drm_bridge_connector_init(struct drm_device *drm, connector_type, ddc); drm_connector_helper_add(connector, &drm_bridge_connector_helper_funcs); - if (bridge_connector->bridge_hpd) { + if (bridge_connector->bridge_hpd) connector->polled = DRM_CONNECTOR_POLL_HPD; - drm_bridge_connector_enable_hpd(connector); - } else if (bridge_connector->bridge_detect) connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; -- cgit v1.2.3 From 60c376e4549b6844af94cf319960ef48080230a8 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 2 Nov 2022 21:07:02 +0300 Subject: drm/imx/dcss: stop using drm_bridge_connector_en/disable_hpd() The functionality of drm_bridge_connector_enable_hpd() and drm_bridge_connector_disable_hpd() is provided automatically by the drm_kms_poll helpers. Stop calling these functions manually. Signed-off-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen [narmstrong: removed now unused kms var in dcss_dev_suspend|resume()] Signed-off-by: Neil Armstrong Link: https://patchwork.freedesktop.org/patch/msgid/20221102180705.459294-5-dmitry.baryshkov@linaro.org --- drivers/gpu/drm/imx/dcss/dcss-dev.c | 6 ------ drivers/gpu/drm/imx/dcss/dcss-kms.c | 2 -- 2 files changed, 8 deletions(-) diff --git a/drivers/gpu/drm/imx/dcss/dcss-dev.c b/drivers/gpu/drm/imx/dcss/dcss-dev.c index 66d9233ffb98..5d1779ab65c0 100644 --- a/drivers/gpu/drm/imx/dcss/dcss-dev.c +++ b/drivers/gpu/drm/imx/dcss/dcss-dev.c @@ -253,11 +253,8 @@ static int dcss_dev_suspend(struct device *dev) { struct dcss_dev *dcss = dcss_drv_dev_to_dcss(dev); struct drm_device *ddev = dcss_drv_dev_to_drm(dev); - struct dcss_kms_dev *kms = container_of(ddev, struct dcss_kms_dev, base); int ret; - drm_bridge_connector_disable_hpd(kms->connector); - drm_mode_config_helper_suspend(ddev); if (pm_runtime_suspended(dev)) @@ -276,7 +273,6 @@ static int dcss_dev_resume(struct device *dev) { struct dcss_dev *dcss = dcss_drv_dev_to_dcss(dev); struct drm_device *ddev = dcss_drv_dev_to_drm(dev); - struct dcss_kms_dev *kms = container_of(ddev, struct dcss_kms_dev, base); if (pm_runtime_suspended(dev)) { drm_mode_config_helper_resume(ddev); @@ -291,8 +287,6 @@ static int dcss_dev_resume(struct device *dev) drm_mode_config_helper_resume(ddev); - drm_bridge_connector_enable_hpd(kms->connector); - return 0; } diff --git a/drivers/gpu/drm/imx/dcss/dcss-kms.c b/drivers/gpu/drm/imx/dcss/dcss-kms.c index 18df3888b7f9..dab5e664920d 100644 --- a/drivers/gpu/drm/imx/dcss/dcss-kms.c +++ b/drivers/gpu/drm/imx/dcss/dcss-kms.c @@ -150,7 +150,6 @@ struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss) return kms; cleanup_crtc: - drm_bridge_connector_disable_hpd(kms->connector); drm_kms_helper_poll_fini(drm); dcss_crtc_deinit(crtc, drm); @@ -166,7 +165,6 @@ void dcss_kms_detach(struct dcss_kms_dev *kms) struct drm_device *drm = &kms->base; drm_dev_unregister(drm); - drm_bridge_connector_disable_hpd(kms->connector); drm_kms_helper_poll_fini(drm); drm_atomic_helper_shutdown(drm); drm_crtc_vblank_off(&kms->crtc.base); -- cgit v1.2.3 From 9e954403bc9cc024cf052e9429c0e6db86ffe0f7 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 2 Nov 2022 21:07:03 +0300 Subject: drm/msm/hdmi: stop using drm_bridge_connector_en/disable_hpd() The functionality of drm_bridge_connector_enable_hpd() and drm_bridge_connector_disable_hpd() is provided automatically by the drm_kms_poll helpers. Stop calling these functions manually. Signed-off-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Signed-off-by: Neil Armstrong Link: https://patchwork.freedesktop.org/patch/msgid/20221102180705.459294-6-dmitry.baryshkov@linaro.org --- drivers/gpu/drm/msm/hdmi/hdmi.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c index f28fb21e3891..ba1969c144cc 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi.c @@ -353,8 +353,6 @@ int msm_hdmi_modeset_init(struct hdmi *hdmi, goto fail; } - drm_bridge_connector_enable_hpd(hdmi->connector); - ret = msm_hdmi_hpd_enable(hdmi->bridge); if (ret < 0) { DRM_DEV_ERROR(&hdmi->pdev->dev, "failed to enable HPD: %d\n", ret); -- cgit v1.2.3 From c4f5538fa65dd093b71859c4792afd4e13fae5f1 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 2 Nov 2022 21:07:04 +0300 Subject: drm/omap: stop using drm_bridge_connector_en/disable_hpd() The functionality of drm_bridge_connector_enable_hpd() and drm_bridge_connector_disable_hpd() is provided automatically by the drm_kms_poll helpers. Stop calling these functions manually. Signed-off-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Signed-off-by: Neil Armstrong Link: https://patchwork.freedesktop.org/patch/msgid/20221102180705.459294-7-dmitry.baryshkov@linaro.org --- drivers/gpu/drm/omapdrm/omap_drv.c | 41 -------------------------------------- 1 file changed, 41 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c index eaf67b9e5f12..699ed814e021 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.c +++ b/drivers/gpu/drm/omapdrm/omap_drv.c @@ -545,44 +545,6 @@ static void omap_modeset_fini(struct drm_device *ddev) drm_mode_config_cleanup(ddev); } -/* - * Enable the HPD in external components if supported - */ -static void omap_modeset_enable_external_hpd(struct drm_device *ddev) -{ - struct omap_drm_private *priv = ddev->dev_private; - unsigned int i; - - for (i = 0; i < priv->num_pipes; i++) { - struct drm_connector *connector = priv->pipes[i].connector; - - if (!connector) - continue; - - if (priv->pipes[i].output->bridge) - drm_bridge_connector_enable_hpd(connector); - } -} - -/* - * Disable the HPD in external components if supported - */ -static void omap_modeset_disable_external_hpd(struct drm_device *ddev) -{ - struct omap_drm_private *priv = ddev->dev_private; - unsigned int i; - - for (i = 0; i < priv->num_pipes; i++) { - struct drm_connector *connector = priv->pipes[i].connector; - - if (!connector) - continue; - - if (priv->pipes[i].output->bridge) - drm_bridge_connector_disable_hpd(connector); - } -} - /* * drm ioctl funcs */ @@ -782,7 +744,6 @@ static int omapdrm_init(struct omap_drm_private *priv, struct device *dev) omap_fbdev_init(ddev); drm_kms_helper_poll_init(ddev); - omap_modeset_enable_external_hpd(ddev); /* * Register the DRM device with the core and the connectors with @@ -795,7 +756,6 @@ static int omapdrm_init(struct omap_drm_private *priv, struct device *dev) return 0; err_cleanup_helpers: - omap_modeset_disable_external_hpd(ddev); drm_kms_helper_poll_fini(ddev); omap_fbdev_fini(ddev); @@ -822,7 +782,6 @@ static void omapdrm_cleanup(struct omap_drm_private *priv) drm_dev_unregister(ddev); - omap_modeset_disable_external_hpd(ddev); drm_kms_helper_poll_fini(ddev); omap_fbdev_fini(ddev); -- cgit v1.2.3 From 4c00ac500d0edd1a6730c4e8293834a694c1b304 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 2 Nov 2022 21:07:05 +0300 Subject: drm/bridge_connector: drop drm_bridge_connector_en/disable_hpd() Now as all drivers stopped calling drm_bridge_connector_enable_hpd() and drm_bridge_connector_disable_hpd() it is safe to remove them complelely. Rename our internal helpers to remove the underscore prefix. Signed-off-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Signed-off-by: Neil Armstrong Link: https://patchwork.freedesktop.org/patch/msgid/20221102180705.459294-8-dmitry.baryshkov@linaro.org --- drivers/gpu/drm/drm_bridge_connector.c | 33 ++++----------------------------- include/drm/drm_bridge_connector.h | 2 -- 2 files changed, 4 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/drm_bridge_connector.c b/drivers/gpu/drm/drm_bridge_connector.c index 0e13bc87a6ac..19ae4a177ac3 100644 --- a/drivers/gpu/drm/drm_bridge_connector.c +++ b/drivers/gpu/drm/drm_bridge_connector.c @@ -128,19 +128,7 @@ static void drm_bridge_connector_hpd_cb(void *cb_data, drm_kms_helper_hotplug_event(dev); } -/** - * drm_bridge_connector_enable_hpd - Enable hot-plug detection for the connector - * @connector: The DRM bridge connector - * - * This function enables hot-plug detection for the given bridge connector. - * This is typically used by display drivers in their resume handler. - */ -void drm_bridge_connector_enable_hpd(struct drm_connector *connector) -{ -} -EXPORT_SYMBOL_GPL(drm_bridge_connector_enable_hpd); - -static void _drm_bridge_connector_enable_hpd(struct drm_connector *connector) +static void drm_bridge_connector_enable_hpd(struct drm_connector *connector) { struct drm_bridge_connector *bridge_connector = to_drm_bridge_connector(connector); @@ -151,20 +139,7 @@ static void _drm_bridge_connector_enable_hpd(struct drm_connector *connector) bridge_connector); } -/** - * drm_bridge_connector_disable_hpd - Disable hot-plug detection for the - * connector - * @connector: The DRM bridge connector - * - * This function disables hot-plug detection for the given bridge connector. - * This is typically used by display drivers in their suspend handler. - */ -void drm_bridge_connector_disable_hpd(struct drm_connector *connector) -{ -} -EXPORT_SYMBOL_GPL(drm_bridge_connector_disable_hpd); - -static void _drm_bridge_connector_disable_hpd(struct drm_connector *connector) +static void drm_bridge_connector_disable_hpd(struct drm_connector *connector) { struct drm_bridge_connector *bridge_connector = to_drm_bridge_connector(connector); @@ -313,8 +288,8 @@ static int drm_bridge_connector_get_modes(struct drm_connector *connector) static const struct drm_connector_helper_funcs drm_bridge_connector_helper_funcs = { .get_modes = drm_bridge_connector_get_modes, /* No need for .mode_valid(), the bridges are checked by the core. */ - .enable_hpd = _drm_bridge_connector_enable_hpd, - .disable_hpd = _drm_bridge_connector_disable_hpd, + .enable_hpd = drm_bridge_connector_enable_hpd, + .disable_hpd = drm_bridge_connector_disable_hpd, }; /* ----------------------------------------------------------------------------- diff --git a/include/drm/drm_bridge_connector.h b/include/drm/drm_bridge_connector.h index 33f6c3bbdb4a..69630815fb09 100644 --- a/include/drm/drm_bridge_connector.h +++ b/include/drm/drm_bridge_connector.h @@ -10,8 +10,6 @@ struct drm_connector; struct drm_device; struct drm_encoder; -void drm_bridge_connector_enable_hpd(struct drm_connector *connector); -void drm_bridge_connector_disable_hpd(struct drm_connector *connector); struct drm_connector *drm_bridge_connector_init(struct drm_device *drm, struct drm_encoder *encoder); -- cgit v1.2.3 From d3533a8af48479a1af1a8fa7fcb0e5161398c94e Mon Sep 17 00:00:00 2001 From: Thomas Zimmermann Date: Fri, 6 Jan 2023 12:23:24 +0100 Subject: drm/fb-helper: Replace bpp/depth parameter by color mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace the combination of bpp and depth with a single color-mode argument. Handle special cases in simpledrm and ofdrm. Hard-code XRGB8888 as fallback format for cases where no given format works. The color-mode argument accepts the same values as the kernel's video parameter. These are mostly bpp values between 1 and 32. The exceptions are 15, which has a color depth of 15 and a bpp value of 16; and 32, which has a color depth of 24 and a bpp value of 32. v4: * add back lost test for bpp_specified (Maira) * add Fixes tag (Daniel) v3: * fix ofdrm build (Maxime) v2: * minimize changes (Daniel) * use drm_driver_legacy_fb_format() (Daniel) Signed-off-by: Thomas Zimmermann Tested-by: Maíra Canal # vc4 and vkms Acked-by: Daniel Vetter Fixes: 37c90d589dc0 ("drm/fb-helper: Fix single-probe color-format selection") Cc: Thomas Zimmermann Cc: Javier Martinez Canillas Cc: Maarten Lankhorst Cc: Maxime Ripard Link: https://patchwork.freedesktop.org/patch/msgid/20230106112324.22055-1-tzimmermann@suse.de --- drivers/gpu/drm/drm_fb_helper.c | 42 +++++++++++++++++++++++----------------- drivers/gpu/drm/tiny/ofdrm.c | 7 ++++++- drivers/gpu/drm/tiny/simpledrm.c | 7 ++++++- 3 files changed, 36 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index 1369ca4ae39b..427631706128 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c @@ -1756,24 +1756,21 @@ err: return DRM_FORMAT_INVALID; } -static uint32_t drm_fb_helper_find_cmdline_format(struct drm_fb_helper *fb_helper, - const uint32_t *formats, size_t format_count, - const struct drm_cmdline_mode *cmdline_mode) +static uint32_t drm_fb_helper_find_color_mode_format(struct drm_fb_helper *fb_helper, + const uint32_t *formats, size_t format_count, + unsigned int color_mode) { struct drm_device *dev = fb_helper->dev; uint32_t bpp, depth; - if (!cmdline_mode->bpp_specified) - return DRM_FORMAT_INVALID; - - switch (cmdline_mode->bpp) { + switch (color_mode) { case 1: case 2: case 4: case 8: case 16: case 24: - bpp = depth = cmdline_mode->bpp; + bpp = depth = color_mode; break; case 15: bpp = 16; @@ -1784,7 +1781,7 @@ static uint32_t drm_fb_helper_find_cmdline_format(struct drm_fb_helper *fb_helpe depth = 24; break; default: - drm_info(dev, "unsupported bpp value of %d\n", cmdline_mode->bpp); + drm_info(dev, "unsupported color mode of %d\n", color_mode); return DRM_FORMAT_INVALID; } @@ -1817,10 +1814,13 @@ static int __drm_fb_helper_find_sizes(struct drm_fb_helper *fb_helper, int prefe drm_client_for_each_connector_iter(connector, &conn_iter) { struct drm_cmdline_mode *cmdline_mode = &connector->cmdline_mode; - surface_format = drm_fb_helper_find_cmdline_format(fb_helper, - plane->format_types, - plane->format_count, - cmdline_mode); + if (!cmdline_mode->bpp_specified) + continue; + + surface_format = drm_fb_helper_find_color_mode_format(fb_helper, + plane->format_types, + plane->format_count, + cmdline_mode->bpp); if (surface_format != DRM_FORMAT_INVALID) break; /* found supported format */ } @@ -1829,17 +1829,23 @@ static int __drm_fb_helper_find_sizes(struct drm_fb_helper *fb_helper, int prefe if (surface_format != DRM_FORMAT_INVALID) break; /* found supported format */ - /* try preferred bpp/depth */ - surface_format = drm_fb_helper_find_format(fb_helper, plane->format_types, - plane->format_count, preferred_bpp, - dev->mode_config.preferred_depth); + /* try preferred color mode */ + surface_format = drm_fb_helper_find_color_mode_format(fb_helper, + plane->format_types, + plane->format_count, + preferred_bpp); if (surface_format != DRM_FORMAT_INVALID) break; /* found supported format */ } if (surface_format == DRM_FORMAT_INVALID) { + /* + * If none of the given color modes works, fall back + * to XRGB8888. Drivers are expected to provide this + * format for compatibility with legacy applications. + */ drm_warn(dev, "No compatible format found\n"); - return -EAGAIN; + surface_format = drm_driver_legacy_fb_format(dev, 32, 24); } info = drm_format_info(surface_format); diff --git a/drivers/gpu/drm/tiny/ofdrm.c b/drivers/gpu/drm/tiny/ofdrm.c index 39c5fd463fec..6e349ca42485 100644 --- a/drivers/gpu/drm/tiny/ofdrm.c +++ b/drivers/gpu/drm/tiny/ofdrm.c @@ -1352,6 +1352,7 @@ static int ofdrm_probe(struct platform_device *pdev) { struct ofdrm_device *odev; struct drm_device *dev; + unsigned int color_mode; int ret; odev = ofdrm_device_create(&ofdrm_driver, pdev); @@ -1363,7 +1364,11 @@ static int ofdrm_probe(struct platform_device *pdev) if (ret) return ret; - drm_fbdev_generic_setup(dev, drm_format_info_bpp(odev->format, 0)); + color_mode = drm_format_info_bpp(odev->format, 0); + if (color_mode == 16) + color_mode = odev->format->depth; // can be 15 or 16 + + drm_fbdev_generic_setup(dev, color_mode); return 0; } diff --git a/drivers/gpu/drm/tiny/simpledrm.c b/drivers/gpu/drm/tiny/simpledrm.c index 7355617f38d3..f658b99c796a 100644 --- a/drivers/gpu/drm/tiny/simpledrm.c +++ b/drivers/gpu/drm/tiny/simpledrm.c @@ -802,6 +802,7 @@ static int simpledrm_probe(struct platform_device *pdev) { struct simpledrm_device *sdev; struct drm_device *dev; + unsigned int color_mode; int ret; sdev = simpledrm_device_create(&simpledrm_driver, pdev); @@ -813,7 +814,11 @@ static int simpledrm_probe(struct platform_device *pdev) if (ret) return ret; - drm_fbdev_generic_setup(dev, drm_format_info_bpp(sdev->format, 0)); + color_mode = drm_format_info_bpp(sdev->format, 0); + if (color_mode == 16) + color_mode = sdev->format->depth; // can be 15 or 16 + + drm_fbdev_generic_setup(dev, color_mode); return 0; } -- cgit v1.2.3 From c702545e19ebb6113d607f2a30ba2ee6cf881a3a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ma=C3=ADra=20Canal?= Date: Mon, 26 Dec 2022 12:50:22 -0300 Subject: drm/gud: use new debugfs device-centered functions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace the use of drm_debugfs_create_files() with the new drm_debugfs_add_file() function, which center the debugfs files management on the drm_device instead of drm_minor. Moreover, remove the debugfs_init hook and add the debugfs files directly on gud_probe(), before drm_dev_register(). Signed-off-by: Maíra Canal Acked-by: Noralf Trønnes Signed-off-by: Maíra Canal Link: https://patchwork.freedesktop.org/patch/msgid/20221226155029.244355-3-mcanal@igalia.com --- drivers/gpu/drm/gud/gud_drv.c | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/gud/gud_drv.c b/drivers/gpu/drm/gud/gud_drv.c index 5aac7cda0505..9d7bf8ee45f1 100644 --- a/drivers/gpu/drm/gud/gud_drv.c +++ b/drivers/gpu/drm/gud/gud_drv.c @@ -325,8 +325,8 @@ static struct drm_gem_object *gud_gem_prime_import(struct drm_device *drm, struc static int gud_stats_debugfs(struct seq_file *m, void *data) { - struct drm_info_node *node = m->private; - struct gud_device *gdrm = to_gud_device(node->minor->dev); + struct drm_debugfs_entry *entry = m->private; + struct gud_device *gdrm = to_gud_device(entry->dev); char buf[10]; string_get_size(gdrm->bulk_len, 1, STRING_UNITS_2, buf, sizeof(buf)); @@ -352,16 +352,6 @@ static int gud_stats_debugfs(struct seq_file *m, void *data) return 0; } -static const struct drm_info_list gud_debugfs_list[] = { - { "stats", gud_stats_debugfs, 0, NULL }, -}; - -static void gud_debugfs_init(struct drm_minor *minor) -{ - drm_debugfs_create_files(gud_debugfs_list, ARRAY_SIZE(gud_debugfs_list), - minor->debugfs_root, minor); -} - static const struct drm_simple_display_pipe_funcs gud_pipe_funcs = { .check = gud_pipe_check, .update = gud_pipe_update, @@ -386,7 +376,6 @@ static const struct drm_driver gud_drm_driver = { .fops = &gud_fops, DRM_GEM_SHMEM_DRIVER_OPS, .gem_prime_import = gud_gem_prime_import, - .debugfs_init = gud_debugfs_init, .name = "gud", .desc = "Generic USB Display", @@ -623,6 +612,8 @@ static int gud_probe(struct usb_interface *intf, const struct usb_device_id *id) if (!gdrm->dmadev) dev_warn(dev, "buffer sharing not supported"); + drm_debugfs_add_file(drm, "stats", gud_stats_debugfs, NULL); + ret = drm_dev_register(drm, 0); if (ret) { put_device(gdrm->dmadev); -- cgit v1.2.3 From 2e3ab8a6994f265bbd4dbd00448b84548f18464c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ma=C3=ADra=20Canal?= Date: Mon, 26 Dec 2022 12:50:23 -0300 Subject: drm/arm/hdlcd: use new debugfs device-centered functions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace the use of drm_debugfs_create_files() with the new drm_debugfs_add_files() function, which center the debugfs files management on the drm_device instead of drm_minor. Moreover, remove the debugfs_init hook and add the debugfs files directly on hdlcd_drm_bind(), before drm_dev_register(). Signed-off-by: Maíra Canal Acked-by: Liviu Dudau Signed-off-by: Maíra Canal Link: https://patchwork.freedesktop.org/patch/msgid/20221226155029.244355-4-mcanal@igalia.com --- drivers/gpu/drm/arm/hdlcd_drv.c | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/arm/hdlcd_drv.c b/drivers/gpu/drm/arm/hdlcd_drv.c index 7043d1c9ed8f..e3507dd6f82a 100644 --- a/drivers/gpu/drm/arm/hdlcd_drv.c +++ b/drivers/gpu/drm/arm/hdlcd_drv.c @@ -195,8 +195,8 @@ static int hdlcd_setup_mode_config(struct drm_device *drm) #ifdef CONFIG_DEBUG_FS static int hdlcd_show_underrun_count(struct seq_file *m, void *arg) { - struct drm_info_node *node = (struct drm_info_node *)m->private; - struct drm_device *drm = node->minor->dev; + struct drm_debugfs_entry *entry = m->private; + struct drm_device *drm = entry->dev; struct hdlcd_drm_private *hdlcd = drm_to_hdlcd_priv(drm); seq_printf(m, "underrun : %d\n", atomic_read(&hdlcd->buffer_underrun_count)); @@ -208,8 +208,8 @@ static int hdlcd_show_underrun_count(struct seq_file *m, void *arg) static int hdlcd_show_pxlclock(struct seq_file *m, void *arg) { - struct drm_info_node *node = (struct drm_info_node *)m->private; - struct drm_device *drm = node->minor->dev; + struct drm_debugfs_entry *entry = m->private; + struct drm_device *drm = entry->dev; struct hdlcd_drm_private *hdlcd = drm_to_hdlcd_priv(drm); unsigned long clkrate = clk_get_rate(hdlcd->clk); unsigned long mode_clock = hdlcd->crtc.mode.crtc_clock * 1000; @@ -219,17 +219,10 @@ static int hdlcd_show_pxlclock(struct seq_file *m, void *arg) return 0; } -static struct drm_info_list hdlcd_debugfs_list[] = { +static struct drm_debugfs_info hdlcd_debugfs_list[] = { { "interrupt_count", hdlcd_show_underrun_count, 0 }, { "clocks", hdlcd_show_pxlclock, 0 }, }; - -static void hdlcd_debugfs_init(struct drm_minor *minor) -{ - drm_debugfs_create_files(hdlcd_debugfs_list, - ARRAY_SIZE(hdlcd_debugfs_list), - minor->debugfs_root, minor); -} #endif DEFINE_DRM_GEM_DMA_FOPS(fops); @@ -237,9 +230,6 @@ DEFINE_DRM_GEM_DMA_FOPS(fops); static const struct drm_driver hdlcd_driver = { .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, DRM_GEM_DMA_DRIVER_OPS, -#ifdef CONFIG_DEBUG_FS - .debugfs_init = hdlcd_debugfs_init, -#endif .fops = &fops, .name = "hdlcd", .desc = "ARM HDLCD Controller DRM", @@ -303,6 +293,10 @@ static int hdlcd_drm_bind(struct device *dev) drm_mode_config_reset(drm); drm_kms_helper_poll_init(drm); +#ifdef CONFIG_DEBUG_FS + drm_debugfs_add_files(drm, hdlcd_debugfs_list, ARRAY_SIZE(hdlcd_debugfs_list)); +#endif + ret = drm_dev_register(drm, 0); if (ret) goto err_register; -- cgit v1.2.3 From 51d3c0e7dc3cf1dd91c34b0f9bdadda310c7ed5b Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Mon, 2 Jan 2023 21:25:41 +0100 Subject: drm/mipi-dsi: Fix mipi_dsi_dcs_write_seq() macro definition format Change made using a `clang-format -i include/drm/drm_mipi_dsi.h` command. Suggested-by: Sam Ravnborg Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/20230102202542.3494677-1-javierm@redhat.com --- include/drm/drm_mipi_dsi.h | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 20b21b577dea..e9d1e8a7fc7e 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -303,15 +303,18 @@ int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi, * @cmd: Command * @seq: buffer containing data to be transmitted */ -#define mipi_dsi_dcs_write_seq(dsi, cmd, seq...) do { \ - static const u8 d[] = { cmd, seq }; \ - struct device *dev = &dsi->dev; \ - int ret; \ - ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) { \ - dev_err_ratelimited(dev, "sending command %#02x failed: %d\n", cmd, ret); \ - return ret; \ - } \ +#define mipi_dsi_dcs_write_seq(dsi, cmd, seq...) \ + do { \ + static const u8 d[] = { cmd, seq }; \ + struct device *dev = &dsi->dev; \ + int ret; \ + ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \ + if (ret < 0) { \ + dev_err_ratelimited( \ + dev, "sending command %#02x failed: %d\n", \ + cmd, ret); \ + return ret; \ + } \ } while (0) /** -- cgit v1.2.3 From a9015ce593204f487bcb3069c5908155ccc59f30 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Mon, 2 Jan 2023 21:25:42 +0100 Subject: drm/mipi-dsi: Add a mipi_dsi_dcs_write_seq() macro Many panel drivers define dsi_dcs_write_seq() and dsi_generic_write_seq() macros to send DCS commands and generic write packets respectively, with the payload specified as a list of parameters instead of using arrays. There's already a macro for the former, introduced by commit 2a9e9daf75231 ("drm/mipi-dsi: Introduce mipi_dsi_dcs_write_seq macro") so drivers can be changed to use that. But there isn't one yet for the latter, let's add it. Signed-off-by: Javier Martinez Canillas Reviewed-by: Sam Ravnborg Link: https://patchwork.freedesktop.org/patch/msgid/20230102202542.3494677-2-javierm@redhat.com --- include/drm/drm_mipi_dsi.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index e9d1e8a7fc7e..4f503d99f668 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -297,6 +297,24 @@ int mipi_dsi_dcs_set_display_brightness(struct mipi_dsi_device *dsi, int mipi_dsi_dcs_get_display_brightness(struct mipi_dsi_device *dsi, u16 *brightness); +/** + * mipi_dsi_generic_write_seq - transmit data using a generic write packet + * @dsi: DSI peripheral device + * @seq: buffer containing the payload + */ +#define mipi_dsi_generic_write_seq(dsi, seq...) \ + do { \ + static const u8 d[] = { seq }; \ + struct device *dev = &dsi->dev; \ + int ret; \ + ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \ + if (ret < 0) { \ + dev_err_ratelimited(dev, "transmit data failed: %d\n", \ + ret); \ + return ret; \ + } \ + } while (0) + /** * mipi_dsi_dcs_write_seq - transmit a DCS command with payload * @dsi: DSI peripheral device -- cgit v1.2.3 From 1284365e3e8cc33849f90cae20bca36fd7544e24 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 7 Dec 2022 12:53:12 +0100 Subject: drm/vc4: hvs: Configure the HVS COB allocations The HVS Composite Output Buffer (COB) is the memory used to generate the output pixel data. Until now the vc4 driver has been relying on the firmware to have set these to sensible values. In testing triple screen support it has been noted that only 1 line was being assigned to HVS channel 2. Whilst that is fine for the transposer (TXP), and indeed needed as only some pixels have an alpha channel, it is insufficient to run a live display. Split the COB more evenly between the 3 HVS channels. Fixes: c54619b0bfb3 ("drm/vc4: Add support for the BCM2711 HVS5") Signed-off-by: Dave Stevenson Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-1-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_hvs.c | 56 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c index 024a2cdff5b2..27096e49c606 100644 --- a/drivers/gpu/drm/vc4/vc4_hvs.c +++ b/drivers/gpu/drm/vc4/vc4_hvs.c @@ -806,7 +806,7 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data) struct vc4_hvs *hvs = NULL; int ret; u32 dispctrl; - u32 reg; + u32 reg, top; hvs = __vc4_hvs_alloc(vc4, NULL); if (IS_ERR(hvs)) @@ -915,6 +915,60 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data) HVS_WRITE(SCALER_DISPCTRL, dispctrl); + /* Recompute Composite Output Buffer (COB) allocations for the displays + */ + if (!vc4->is_vc5) { + /* The COB is 20736 pixels, or just over 10 lines at 2048 wide. + * The bottom 2048 pixels are full 32bpp RGBA (intended for the + * TXP composing RGBA to memory), whilst the remainder are only + * 24bpp RGB. + * + * Assign 3 lines to channels 1 & 2, and just over 4 lines to + * channel 0. + */ + #define VC4_COB_SIZE 20736 + #define VC4_COB_LINE_WIDTH 2048 + #define VC4_COB_NUM_LINES 3 + reg = 0; + top = VC4_COB_LINE_WIDTH * VC4_COB_NUM_LINES; + reg |= (top - 1) << 16; + HVS_WRITE(SCALER_DISPBASE2, reg); + reg = top; + top += VC4_COB_LINE_WIDTH * VC4_COB_NUM_LINES; + reg |= (top - 1) << 16; + HVS_WRITE(SCALER_DISPBASE1, reg); + reg = top; + top = VC4_COB_SIZE; + reg |= (top - 1) << 16; + HVS_WRITE(SCALER_DISPBASE0, reg); + } else { + /* The COB is 44416 pixels, or 10.8 lines at 4096 wide. + * The bottom 4096 pixels are full RGBA (intended for the TXP + * composing RGBA to memory), whilst the remainder are only + * RGB. Addressing is always pixel wide. + * + * Assign 3 lines of 4096 to channels 1 & 2, and just over 4 + * lines. to channel 0. + */ + #define VC5_COB_SIZE 44416 + #define VC5_COB_LINE_WIDTH 4096 + #define VC5_COB_NUM_LINES 3 + reg = 0; + top = VC5_COB_LINE_WIDTH * VC5_COB_NUM_LINES; + reg |= top << 16; + HVS_WRITE(SCALER_DISPBASE2, reg); + top += 16; + reg = top; + top += VC5_COB_LINE_WIDTH * VC5_COB_NUM_LINES; + reg |= top << 16; + HVS_WRITE(SCALER_DISPBASE1, reg); + top += 16; + reg = top; + top = VC5_COB_SIZE; + reg |= top << 16; + HVS_WRITE(SCALER_DISPBASE0, reg); + } + ret = devm_request_irq(dev, platform_get_irq(pdev, 0), vc4_hvs_irq_handler, 0, "vc4 hvs", drm); if (ret) -- cgit v1.2.3 From df993fced230daa8452892406f3180c93ebf7e7b Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 7 Dec 2022 12:53:13 +0100 Subject: drm/vc4: hvs: Set AXI panic modes The HVS can change AXI request mode based on how full the COB FIFOs are. Until now the vc4 driver has been relying on the firmware to have set these to sensible values. With HVS channel 2 now being used for live video, change the panic mode for all channels to be explicitly set by the driver, and the same for all channels. Fixes: c54619b0bfb3 ("drm/vc4: Add support for the BCM2711 HVS5") Signed-off-by: Dave Stevenson Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-2-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_hvs.c | 11 +++++++++++ drivers/gpu/drm/vc4/vc4_regs.h | 6 ++++++ 2 files changed, 17 insertions(+) diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c index 27096e49c606..5cdecb5ec79a 100644 --- a/drivers/gpu/drm/vc4/vc4_hvs.c +++ b/drivers/gpu/drm/vc4/vc4_hvs.c @@ -913,6 +913,17 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data) SCALER_DISPCTRL_DSPEISLUR(2) | SCALER_DISPCTRL_SCLEIRQ); + /* Set AXI panic mode. + * VC4 panics when < 2 lines in FIFO. + * VC5 panics when less than 1 line in the FIFO. + */ + dispctrl &= ~(SCALER_DISPCTRL_PANIC0_MASK | + SCALER_DISPCTRL_PANIC1_MASK | + SCALER_DISPCTRL_PANIC2_MASK); + dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC0); + dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC1); + dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_PANIC2); + HVS_WRITE(SCALER_DISPCTRL, dispctrl); /* Recompute Composite Output Buffer (COB) allocations for the displays diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h index f0290fad991d..f121905c404d 100644 --- a/drivers/gpu/drm/vc4/vc4_regs.h +++ b/drivers/gpu/drm/vc4/vc4_regs.h @@ -220,6 +220,12 @@ #define SCALER_DISPCTRL 0x00000000 /* Global register for clock gating the HVS */ # define SCALER_DISPCTRL_ENABLE BIT(31) +# define SCALER_DISPCTRL_PANIC0_MASK VC4_MASK(25, 24) +# define SCALER_DISPCTRL_PANIC0_SHIFT 24 +# define SCALER_DISPCTRL_PANIC1_MASK VC4_MASK(27, 26) +# define SCALER_DISPCTRL_PANIC1_SHIFT 26 +# define SCALER_DISPCTRL_PANIC2_MASK VC4_MASK(29, 28) +# define SCALER_DISPCTRL_PANIC2_SHIFT 28 # define SCALER_DISPCTRL_DSP3_MUX_MASK VC4_MASK(19, 18) # define SCALER_DISPCTRL_DSP3_MUX_SHIFT 18 -- cgit v1.2.3 From 982ee94486863a41c6af9f2ab3f6681f72bc5c48 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 7 Dec 2022 12:53:14 +0100 Subject: drm/vc4: hvs: SCALER_DISPBKGND_AUTOHS is only valid on HVS4 The bit used for SCALER_DISPBKGND_AUTOHS in SCALER_DISPBKGNDX has been repurposed on HVS5 to configure whether a display can win back-to-back arbitration wins for the COB. This is not desirable, therefore only select this bit on HVS4, and explicitly clear it on HVS5. Fixes: c54619b0bfb3 ("drm/vc4: Add support for the BCM2711 HVS5") Signed-off-by: Dave Stevenson Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-3-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_hvs.c | 10 ++++++---- drivers/gpu/drm/vc4/vc4_regs.h | 1 + 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c index 5cdecb5ec79a..0fc6d745bdb3 100644 --- a/drivers/gpu/drm/vc4/vc4_hvs.c +++ b/drivers/gpu/drm/vc4/vc4_hvs.c @@ -370,28 +370,30 @@ static int vc4_hvs_init_channel(struct vc4_hvs *hvs, struct drm_crtc *crtc, * mode. */ dispctrl = SCALER_DISPCTRLX_ENABLE; + dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(chan)); - if (!vc4->is_vc5) + if (!vc4->is_vc5) { dispctrl |= VC4_SET_FIELD(mode->hdisplay, SCALER_DISPCTRLX_WIDTH) | VC4_SET_FIELD(mode->vdisplay, SCALER_DISPCTRLX_HEIGHT) | (oneshot ? SCALER_DISPCTRLX_ONESHOT : 0); - else + dispbkgndx |= SCALER_DISPBKGND_AUTOHS; + } else { dispctrl |= VC4_SET_FIELD(mode->hdisplay, SCALER5_DISPCTRLX_WIDTH) | VC4_SET_FIELD(mode->vdisplay, SCALER5_DISPCTRLX_HEIGHT) | (oneshot ? SCALER5_DISPCTRLX_ONESHOT : 0); + dispbkgndx &= ~SCALER5_DISPBKGND_BCK2BCK; + } HVS_WRITE(SCALER_DISPCTRLX(chan), dispctrl); - dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(chan)); dispbkgndx &= ~SCALER_DISPBKGND_GAMMA; dispbkgndx &= ~SCALER_DISPBKGND_INTERLACE; HVS_WRITE(SCALER_DISPBKGNDX(chan), dispbkgndx | - SCALER_DISPBKGND_AUTOHS | ((!vc4->is_vc5) ? SCALER_DISPBKGND_GAMMA : 0) | (interlace ? SCALER_DISPBKGND_INTERLACE : 0)); diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h index f121905c404d..95deacdc31e7 100644 --- a/drivers/gpu/drm/vc4/vc4_regs.h +++ b/drivers/gpu/drm/vc4/vc4_regs.h @@ -366,6 +366,7 @@ #define SCALER_DISPBKGND0 0x00000044 # define SCALER_DISPBKGND_AUTOHS BIT(31) +# define SCALER5_DISPBKGND_BCK2BCK BIT(31) # define SCALER_DISPBKGND_INTERLACE BIT(30) # define SCALER_DISPBKGND_GAMMA BIT(29) # define SCALER_DISPBKGND_TESTMODE_MASK VC4_MASK(28, 25) -- cgit v1.2.3 From 87551ec650bb87d35f1b29bba6a2430896e08da0 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 7 Dec 2022 12:53:15 +0100 Subject: drm/vc4: hvs: Correct interrupt masking bit assignment for HVS5 HVS5 has moved the interrupt enable bits around within the DISPCTRL register, therefore the configuration has to be updated to account for this. Fixes: c54619b0bfb3 ("drm/vc4: Add support for the BCM2711 HVS5") Signed-off-by: Dave Stevenson Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-4-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_hvs.c | 52 +++++++++++++++++++++++++++++------------- drivers/gpu/drm/vc4/vc4_regs.h | 10 ++++++-- 2 files changed, 44 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c index 0fc6d745bdb3..56a0a1d8aee0 100644 --- a/drivers/gpu/drm/vc4/vc4_hvs.c +++ b/drivers/gpu/drm/vc4/vc4_hvs.c @@ -660,7 +660,8 @@ void vc4_hvs_mask_underrun(struct vc4_hvs *hvs, int channel) return; dispctrl = HVS_READ(SCALER_DISPCTRL); - dispctrl &= ~SCALER_DISPCTRL_DSPEISLUR(channel); + dispctrl &= ~(hvs->vc4->is_vc5 ? SCALER5_DISPCTRL_DSPEISLUR(channel) : + SCALER_DISPCTRL_DSPEISLUR(channel)); HVS_WRITE(SCALER_DISPCTRL, dispctrl); @@ -677,7 +678,8 @@ void vc4_hvs_unmask_underrun(struct vc4_hvs *hvs, int channel) return; dispctrl = HVS_READ(SCALER_DISPCTRL); - dispctrl |= SCALER_DISPCTRL_DSPEISLUR(channel); + dispctrl |= (hvs->vc4->is_vc5 ? SCALER5_DISPCTRL_DSPEISLUR(channel) : + SCALER_DISPCTRL_DSPEISLUR(channel)); HVS_WRITE(SCALER_DISPSTAT, SCALER_DISPSTAT_EUFLOW(channel)); @@ -703,6 +705,7 @@ static irqreturn_t vc4_hvs_irq_handler(int irq, void *data) int channel; u32 control; u32 status; + u32 dspeislur; /* * NOTE: We don't need to protect the register access using @@ -719,9 +722,11 @@ static irqreturn_t vc4_hvs_irq_handler(int irq, void *data) control = HVS_READ(SCALER_DISPCTRL); for (channel = 0; channel < SCALER_CHANNELS_COUNT; channel++) { + dspeislur = vc4->is_vc5 ? SCALER5_DISPCTRL_DSPEISLUR(channel) : + SCALER_DISPCTRL_DSPEISLUR(channel); /* Interrupt masking is not always honored, so check it here. */ if (status & SCALER_DISPSTAT_EUFLOW(channel) && - control & SCALER_DISPCTRL_DSPEISLUR(channel)) { + control & dspeislur) { vc4_hvs_mask_underrun(hvs, channel); vc4_hvs_report_underrun(dev); @@ -901,19 +906,34 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data) SCALER_DISPCTRL_DISPEIRQ(1) | SCALER_DISPCTRL_DISPEIRQ(2); - dispctrl &= ~(SCALER_DISPCTRL_DMAEIRQ | - SCALER_DISPCTRL_SLVWREIRQ | - SCALER_DISPCTRL_SLVRDEIRQ | - SCALER_DISPCTRL_DSPEIEOF(0) | - SCALER_DISPCTRL_DSPEIEOF(1) | - SCALER_DISPCTRL_DSPEIEOF(2) | - SCALER_DISPCTRL_DSPEIEOLN(0) | - SCALER_DISPCTRL_DSPEIEOLN(1) | - SCALER_DISPCTRL_DSPEIEOLN(2) | - SCALER_DISPCTRL_DSPEISLUR(0) | - SCALER_DISPCTRL_DSPEISLUR(1) | - SCALER_DISPCTRL_DSPEISLUR(2) | - SCALER_DISPCTRL_SCLEIRQ); + if (!vc4->is_vc5) + dispctrl &= ~(SCALER_DISPCTRL_DMAEIRQ | + SCALER_DISPCTRL_SLVWREIRQ | + SCALER_DISPCTRL_SLVRDEIRQ | + SCALER_DISPCTRL_DSPEIEOF(0) | + SCALER_DISPCTRL_DSPEIEOF(1) | + SCALER_DISPCTRL_DSPEIEOF(2) | + SCALER_DISPCTRL_DSPEIEOLN(0) | + SCALER_DISPCTRL_DSPEIEOLN(1) | + SCALER_DISPCTRL_DSPEIEOLN(2) | + SCALER_DISPCTRL_DSPEISLUR(0) | + SCALER_DISPCTRL_DSPEISLUR(1) | + SCALER_DISPCTRL_DSPEISLUR(2) | + SCALER_DISPCTRL_SCLEIRQ); + else + dispctrl &= ~(SCALER_DISPCTRL_DMAEIRQ | + SCALER5_DISPCTRL_SLVEIRQ | + SCALER5_DISPCTRL_DSPEIEOF(0) | + SCALER5_DISPCTRL_DSPEIEOF(1) | + SCALER5_DISPCTRL_DSPEIEOF(2) | + SCALER5_DISPCTRL_DSPEIEOLN(0) | + SCALER5_DISPCTRL_DSPEIEOLN(1) | + SCALER5_DISPCTRL_DSPEIEOLN(2) | + SCALER5_DISPCTRL_DSPEISLUR(0) | + SCALER5_DISPCTRL_DSPEISLUR(1) | + SCALER5_DISPCTRL_DSPEISLUR(2) | + SCALER_DISPCTRL_SCLEIRQ); + /* Set AXI panic mode. * VC4 panics when < 2 lines in FIFO. diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h index 95deacdc31e7..1256f0877ff6 100644 --- a/drivers/gpu/drm/vc4/vc4_regs.h +++ b/drivers/gpu/drm/vc4/vc4_regs.h @@ -234,15 +234,21 @@ * always enabled. */ # define SCALER_DISPCTRL_DSPEISLUR(x) BIT(13 + (x)) +# define SCALER5_DISPCTRL_DSPEISLUR(x) BIT(9 + ((x) * 4)) /* Enables Display 0 end-of-line-N contribution to * SCALER_DISPSTAT_IRQDISP0 */ # define SCALER_DISPCTRL_DSPEIEOLN(x) BIT(8 + ((x) * 2)) +# define SCALER5_DISPCTRL_DSPEIEOLN(x) BIT(8 + ((x) * 4)) /* Enables Display 0 EOF contribution to SCALER_DISPSTAT_IRQDISP0 */ # define SCALER_DISPCTRL_DSPEIEOF(x) BIT(7 + ((x) * 2)) +# define SCALER5_DISPCTRL_DSPEIEOF(x) BIT(7 + ((x) * 4)) -# define SCALER_DISPCTRL_SLVRDEIRQ BIT(6) -# define SCALER_DISPCTRL_SLVWREIRQ BIT(5) +# define SCALER5_DISPCTRL_DSPEIVST(x) BIT(6 + ((x) * 4)) + +# define SCALER_DISPCTRL_SLVRDEIRQ BIT(6) /* HVS4 only */ +# define SCALER_DISPCTRL_SLVWREIRQ BIT(5) /* HVS4 only */ +# define SCALER5_DISPCTRL_SLVEIRQ BIT(5) # define SCALER_DISPCTRL_DMAEIRQ BIT(4) /* Enables interrupt generation on the enabled EOF/EOLN/EISLUR * bits and short frames.. -- cgit v1.2.3 From 868bc9994c0c6b229989623c7614f15853bf16b5 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 7 Dec 2022 12:53:16 +0100 Subject: drm/vc4: hvs: Support zpos on all planes Adds the zpos property to all planes, and creates the dlist by placing the fragments in the correct order based on zpos. Signed-off-by: Dave Stevenson Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-5-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_hvs.c | 43 +++++++++++++++++++++++++++-------------- drivers/gpu/drm/vc4/vc4_kms.c | 1 + drivers/gpu/drm/vc4/vc4_plane.c | 22 ++++++++++++++++++--- 3 files changed, 48 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c index 56a0a1d8aee0..260efd44a821 100644 --- a/drivers/gpu/drm/vc4/vc4_hvs.c +++ b/drivers/gpu/drm/vc4/vc4_hvs.c @@ -570,6 +570,8 @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc, bool enable_bg_fill = false; u32 __iomem *dlist_start = vc4->hvs->dlist + vc4_state->mm.start; u32 __iomem *dlist_next = dlist_start; + unsigned int zpos = 0; + bool found = false; int idx; if (!drm_dev_enter(dev, &idx)) { @@ -583,23 +585,34 @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc, } /* Copy all the active planes' dlist contents to the hardware dlist. */ - drm_atomic_crtc_for_each_plane(plane, crtc) { - /* Is this the first active plane? */ - if (dlist_next == dlist_start) { - /* We need to enable background fill when a plane - * could be alpha blending from the background, i.e. - * where no other plane is underneath. It suffices to - * consider the first active plane here since we set - * needs_bg_fill such that either the first plane - * already needs it or all planes on top blend from - * the first or a lower plane. - */ - vc4_plane_state = to_vc4_plane_state(plane->state); - enable_bg_fill = vc4_plane_state->needs_bg_fill; + do { + found = false; + + drm_atomic_crtc_for_each_plane(plane, crtc) { + if (plane->state->normalized_zpos != zpos) + continue; + + /* Is this the first active plane? */ + if (dlist_next == dlist_start) { + /* We need to enable background fill when a plane + * could be alpha blending from the background, i.e. + * where no other plane is underneath. It suffices to + * consider the first active plane here since we set + * needs_bg_fill such that either the first plane + * already needs it or all planes on top blend from + * the first or a lower plane. + */ + vc4_plane_state = to_vc4_plane_state(plane->state); + enable_bg_fill = vc4_plane_state->needs_bg_fill; + } + + dlist_next += vc4_plane_write_dlist(plane, dlist_next); + + found = true; } - dlist_next += vc4_plane_write_dlist(plane, dlist_next); - } + zpos++; + } while (found); writel(SCALER_CTL0_END, dlist_next); dlist_next++; diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c index 53d9f30460cf..a7e3d47c50f4 100644 --- a/drivers/gpu/drm/vc4/vc4_kms.c +++ b/drivers/gpu/drm/vc4/vc4_kms.c @@ -1074,6 +1074,7 @@ int vc4_kms_load(struct drm_device *dev) dev->mode_config.helper_private = &vc4_mode_config_helpers; dev->mode_config.preferred_depth = 24; dev->mode_config.async_page_flip = true; + dev->mode_config.normalize_zpos = true; ret = vc4_ctm_obj_init(vc4); if (ret) diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index 8b92a45a3c89..c212f8c10388 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -1568,9 +1568,14 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev, DRM_COLOR_YCBCR_BT709, DRM_COLOR_YCBCR_LIMITED_RANGE); + if (type == DRM_PLANE_TYPE_PRIMARY) + drm_plane_create_zpos_immutable_property(plane, 0); + return plane; } +#define VC4_NUM_OVERLAY_PLANES 16 + int vc4_plane_create_additional_planes(struct drm_device *drm) { struct drm_plane *cursor_plane; @@ -1586,24 +1591,35 @@ int vc4_plane_create_additional_planes(struct drm_device *drm) * modest number of planes to expose, that should hopefully * still cover any sane usecase. */ - for (i = 0; i < 16; i++) { + for (i = 0; i < VC4_NUM_OVERLAY_PLANES; i++) { struct drm_plane *plane = vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY, GENMASK(drm->mode_config.num_crtc - 1, 0)); if (IS_ERR(plane)) continue; + + /* Create zpos property. Max of all the overlays + 1 primary + + * 1 cursor plane on a crtc. + */ + drm_plane_create_zpos_property(plane, i + 1, 1, + VC4_NUM_OVERLAY_PLANES + 1); } drm_for_each_crtc(crtc, drm) { /* Set up the legacy cursor after overlay initialization, - * since we overlay planes on the CRTC in the order they were - * initialized. + * since the zpos fallback is that planes are rendered by plane + * ID order, and that then puts the cursor on top. */ cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR, drm_crtc_mask(crtc)); if (!IS_ERR(cursor_plane)) { crtc->cursor = cursor_plane; + + drm_plane_create_zpos_property(cursor_plane, + VC4_NUM_OVERLAY_PLANES + 1, + 1, + VC4_NUM_OVERLAY_PLANES + 1); } } -- cgit v1.2.3 From 902973dc1a049c0d7bf0c222b8f2b3876f01b4a2 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 7 Dec 2022 12:53:17 +0100 Subject: drm/vc4: hvs: Fix colour order for xRGB1555 on HVS5 Same as the xRGB8888 formats, HVS5 has managed to swap the colour channels for the xRGB1555 formats as well. Add the relevant config for pixel_order_hvs5. Fixes: c54619b0bfb3 ("drm/vc4: Add support for the BCM2711 HVS5") Signed-off-by: Dave Stevenson Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-6-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_plane.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index c212f8c10388..e60d6f1a7de1 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -75,11 +75,13 @@ static const struct hvs_format { .drm = DRM_FORMAT_ARGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551, .pixel_order = HVS_PIXEL_ORDER_ABGR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB, }, { .drm = DRM_FORMAT_XRGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551, .pixel_order = HVS_PIXEL_ORDER_ABGR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB, }, { .drm = DRM_FORMAT_RGB888, -- cgit v1.2.3 From f92534ea5cb1e5485218c0ed7cc5d588e28e668e Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 7 Dec 2022 12:53:18 +0100 Subject: drm/vc4: hvs: Add DRM 210101010 RGB formats HVS5 supports the 210101010 RGB[A|X] formats, but they were missing from the DRM to HVS mapping list, so weren't available. Add them in. Signed-off-by: Dave Stevenson Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-7-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_plane.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index e60d6f1a7de1..eb0ac2167937 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -139,6 +139,34 @@ static const struct hvs_format { .pixel_order = HVS_PIXEL_ORDER_XYCBCR, .hvs5_only = true, }, + { + .drm = DRM_FORMAT_XRGB2101010, + .hvs = HVS_PIXEL_FORMAT_RGBA1010102, + .pixel_order = HVS_PIXEL_ORDER_ABGR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB, + .hvs5_only = true, + }, + { + .drm = DRM_FORMAT_ARGB2101010, + .hvs = HVS_PIXEL_FORMAT_RGBA1010102, + .pixel_order = HVS_PIXEL_ORDER_ABGR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB, + .hvs5_only = true, + }, + { + .drm = DRM_FORMAT_ABGR2101010, + .hvs = HVS_PIXEL_FORMAT_RGBA1010102, + .pixel_order = HVS_PIXEL_ORDER_ARGB, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR, + .hvs5_only = true, + }, + { + .drm = DRM_FORMAT_XBGR2101010, + .hvs = HVS_PIXEL_FORMAT_RGBA1010102, + .pixel_order = HVS_PIXEL_ORDER_ARGB, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR, + .hvs5_only = true, + }, }; static const struct hvs_format *vc4_get_hvs_format(u32 drm_format) -- cgit v1.2.3 From 92c17d16476c71329a2978f80f23ce1009c69c55 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 7 Dec 2022 12:53:19 +0100 Subject: drm/vc4: hvs: Ignore atomic_flush if we're disabled atomic_flush will be called for each CRTC even if they aren't enabled. The whole code we have there will thus run without a properly affected channel, which can then result in all sorts of weird behaviour. Reviewed-by: Dave Stevenson Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-8-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_hvs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c index 260efd44a821..4da66ef96783 100644 --- a/drivers/gpu/drm/vc4/vc4_hvs.c +++ b/drivers/gpu/drm/vc4/vc4_hvs.c @@ -579,6 +579,9 @@ void vc4_hvs_atomic_flush(struct drm_crtc *crtc, return; } + if (vc4_state->assigned_channel == VC4_HVS_CHANNEL_DISABLED) + return; + if (debug_dump_regs) { DRM_INFO("CRTC %d HVS before:\n", drm_crtc_index(crtc)); vc4_hvs_dump_state(hvs); -- cgit v1.2.3 From 02c98b16ae07f3a661146678c649ac31021e64ca Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 7 Dec 2022 12:53:20 +0100 Subject: drm/vc4: plane: Allow using 0 as a pixel order value vc4_plane_mode_set for HVS5 was using pixel_order unless pixel_order_hvs5 was non-zero, except 0 is a valid value for the pixel_order. Specify pixel_order_hvs5 for all formats and remove the conditional. Signed-off-by: Dave Stevenson Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-9-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_plane.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index eb0ac2167937..8b4805c937f0 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -65,11 +65,13 @@ static const struct hvs_format { .drm = DRM_FORMAT_RGB565, .hvs = HVS_PIXEL_FORMAT_RGB565, .pixel_order = HVS_PIXEL_ORDER_XRGB, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_XRGB, }, { .drm = DRM_FORMAT_BGR565, .hvs = HVS_PIXEL_FORMAT_RGB565, .pixel_order = HVS_PIXEL_ORDER_XBGR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_XBGR, }, { .drm = DRM_FORMAT_ARGB1555, @@ -87,56 +89,67 @@ static const struct hvs_format { .drm = DRM_FORMAT_RGB888, .hvs = HVS_PIXEL_FORMAT_RGB888, .pixel_order = HVS_PIXEL_ORDER_XRGB, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_XRGB, }, { .drm = DRM_FORMAT_BGR888, .hvs = HVS_PIXEL_FORMAT_RGB888, .pixel_order = HVS_PIXEL_ORDER_XBGR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_XBGR, }, { .drm = DRM_FORMAT_YUV422, .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE, .pixel_order = HVS_PIXEL_ORDER_XYCBCR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR, }, { .drm = DRM_FORMAT_YVU422, .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE, .pixel_order = HVS_PIXEL_ORDER_XYCRCB, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB, }, { .drm = DRM_FORMAT_YUV420, .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE, .pixel_order = HVS_PIXEL_ORDER_XYCBCR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR, }, { .drm = DRM_FORMAT_YVU420, .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE, .pixel_order = HVS_PIXEL_ORDER_XYCRCB, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB, }, { .drm = DRM_FORMAT_NV12, .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE, .pixel_order = HVS_PIXEL_ORDER_XYCBCR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR, }, { .drm = DRM_FORMAT_NV21, .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE, .pixel_order = HVS_PIXEL_ORDER_XYCRCB, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB, }, { .drm = DRM_FORMAT_NV16, .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE, .pixel_order = HVS_PIXEL_ORDER_XYCBCR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR, }, { .drm = DRM_FORMAT_NV61, .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE, .pixel_order = HVS_PIXEL_ORDER_XYCRCB, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCRCB, }, { .drm = DRM_FORMAT_P030, .hvs = HVS_PIXEL_FORMAT_YCBCR_10BIT, .pixel_order = HVS_PIXEL_ORDER_XYCBCR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR, .hvs5_only = true, }, { @@ -1031,15 +1044,10 @@ static int vc4_plane_mode_set(struct drm_plane *plane, vc4_dlist_write(vc4_state, 0xc0c0c0c0); } else { - u32 hvs_pixel_order = format->pixel_order; - - if (format->pixel_order_hvs5) - hvs_pixel_order = format->pixel_order_hvs5; - /* Control word */ vc4_dlist_write(vc4_state, SCALER_CTL0_VALID | - (hvs_pixel_order << SCALER_CTL0_ORDER_SHIFT) | + (format->pixel_order_hvs5 << SCALER_CTL0_ORDER_SHIFT) | (hvs_format << SCALER_CTL0_PIXEL_FORMAT_SHIFT) | VC4_SET_FIELD(tiling, SCALER_CTL0_TILING) | (vc4_state->is_unity ? -- cgit v1.2.3 From d5e606e594eef125c4cb12676a8817c4eb7cd431 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 7 Dec 2022 12:53:21 +0100 Subject: drm/vc4: plane: Omit pixel_order from the hvs_format for hvs5 only formats pixel_order is used for the earlier versions of the HVS, so is redundant on the 10:10:10:2 and 10bit YUV formats that are only supported on HVS5. Remove the assignment from the table to avoid confusion. Signed-off-by: Dave Stevenson Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-10-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_plane.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index 8b4805c937f0..7b7bbe94d47a 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -148,35 +148,30 @@ static const struct hvs_format { { .drm = DRM_FORMAT_P030, .hvs = HVS_PIXEL_FORMAT_YCBCR_10BIT, - .pixel_order = HVS_PIXEL_ORDER_XYCBCR, .pixel_order_hvs5 = HVS_PIXEL_ORDER_XYCBCR, .hvs5_only = true, }, { .drm = DRM_FORMAT_XRGB2101010, .hvs = HVS_PIXEL_FORMAT_RGBA1010102, - .pixel_order = HVS_PIXEL_ORDER_ABGR, .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB, .hvs5_only = true, }, { .drm = DRM_FORMAT_ARGB2101010, .hvs = HVS_PIXEL_FORMAT_RGBA1010102, - .pixel_order = HVS_PIXEL_ORDER_ABGR, .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB, .hvs5_only = true, }, { .drm = DRM_FORMAT_ABGR2101010, .hvs = HVS_PIXEL_FORMAT_RGBA1010102, - .pixel_order = HVS_PIXEL_ORDER_ARGB, .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR, .hvs5_only = true, }, { .drm = DRM_FORMAT_XBGR2101010, .hvs = HVS_PIXEL_FORMAT_RGBA1010102, - .pixel_order = HVS_PIXEL_ORDER_ARGB, .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR, .hvs5_only = true, }, -- cgit v1.2.3 From 977374cf481d3bea916b2775e6ecc682b9689550 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 7 Dec 2022 12:53:22 +0100 Subject: drm/vc4: plane: Add 3:3:2 and 4:4:4:4 RGB/RGBX/RGBA formats The hardware supports the 332 8bpp and 4:4:4:4 16bpp formats, but the table of supported formats didn't include them. Add them in. In theory they are supported for T-format as well as linear, but without a way to test them just add them as linear for now. Signed-off-by: Dave Stevenson Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-11-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_plane.c | 70 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index 7b7bbe94d47a..dee525bacd4b 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -175,6 +175,66 @@ static const struct hvs_format { .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR, .hvs5_only = true, }, + { + .drm = DRM_FORMAT_RGB332, + .hvs = HVS_PIXEL_FORMAT_RGB332, + .pixel_order = HVS_PIXEL_ORDER_ARGB, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB, + }, + { + .drm = DRM_FORMAT_BGR233, + .hvs = HVS_PIXEL_FORMAT_RGB332, + .pixel_order = HVS_PIXEL_ORDER_ABGR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR, + }, + { + .drm = DRM_FORMAT_XRGB4444, + .hvs = HVS_PIXEL_FORMAT_RGBA4444, + .pixel_order = HVS_PIXEL_ORDER_ABGR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB, + }, + { + .drm = DRM_FORMAT_ARGB4444, + .hvs = HVS_PIXEL_FORMAT_RGBA4444, + .pixel_order = HVS_PIXEL_ORDER_ABGR, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB, + }, + { + .drm = DRM_FORMAT_XBGR4444, + .hvs = HVS_PIXEL_FORMAT_RGBA4444, + .pixel_order = HVS_PIXEL_ORDER_ARGB, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR, + }, + { + .drm = DRM_FORMAT_ABGR4444, + .hvs = HVS_PIXEL_FORMAT_RGBA4444, + .pixel_order = HVS_PIXEL_ORDER_ARGB, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR, + }, + { + .drm = DRM_FORMAT_BGRX4444, + .hvs = HVS_PIXEL_FORMAT_RGBA4444, + .pixel_order = HVS_PIXEL_ORDER_RGBA, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_BGRA, + }, + { + .drm = DRM_FORMAT_BGRA4444, + .hvs = HVS_PIXEL_FORMAT_RGBA4444, + .pixel_order = HVS_PIXEL_ORDER_RGBA, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_BGRA, + }, + { + .drm = DRM_FORMAT_RGBX4444, + .hvs = HVS_PIXEL_FORMAT_RGBA4444, + .pixel_order = HVS_PIXEL_ORDER_BGRA, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_RGBA, + }, + { + .drm = DRM_FORMAT_RGBA4444, + .hvs = HVS_PIXEL_FORMAT_RGBA4444, + .pixel_order = HVS_PIXEL_ORDER_BGRA, + .pixel_order_hvs5 = HVS_PIXEL_ORDER_RGBA, + }, }; static const struct hvs_format *vc4_get_hvs_format(u32 drm_format) @@ -1521,6 +1581,16 @@ static bool vc4_format_mod_supported(struct drm_plane *plane, case DRM_FORMAT_BGRX1010102: case DRM_FORMAT_RGBA1010102: case DRM_FORMAT_BGRA1010102: + case DRM_FORMAT_XRGB4444: + case DRM_FORMAT_ARGB4444: + case DRM_FORMAT_XBGR4444: + case DRM_FORMAT_ABGR4444: + case DRM_FORMAT_RGBX4444: + case DRM_FORMAT_RGBA4444: + case DRM_FORMAT_BGRX4444: + case DRM_FORMAT_BGRA4444: + case DRM_FORMAT_RGB332: + case DRM_FORMAT_BGR233: case DRM_FORMAT_YUV422: case DRM_FORMAT_YVU422: case DRM_FORMAT_YUV420: -- cgit v1.2.3 From 6c37c9c65d2c792ddee3e33e595a498592bf9735 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 7 Dec 2022 12:53:23 +0100 Subject: drm/vc4: Add comments for which HVS_PIXEL_ORDER_xxx defines apply The HVS_PIXEL_ORDER_xxx defines apply to specific HVS_PIXEL_FORMAT_xxx modes, so add comments to make this obvious. Signed-off-by: Dave Stevenson Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-12-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_regs.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h index 1256f0877ff6..f3763bd600f6 100644 --- a/drivers/gpu/drm/vc4/vc4_regs.h +++ b/drivers/gpu/drm/vc4/vc4_regs.h @@ -848,16 +848,19 @@ enum hvs_pixel_format { /* Note: the LSB is the rightmost character shown. Only valid for * HVS_PIXEL_FORMAT_RGB8888, not RGB888. */ +/* For modes 332, 4444, 555, 5551, 6666, 8888, 10:10:10:2 */ #define HVS_PIXEL_ORDER_RGBA 0 #define HVS_PIXEL_ORDER_BGRA 1 #define HVS_PIXEL_ORDER_ARGB 2 #define HVS_PIXEL_ORDER_ABGR 3 +/* For modes 666 and 888 (4 & 5) */ #define HVS_PIXEL_ORDER_XBRG 0 #define HVS_PIXEL_ORDER_XRBG 1 #define HVS_PIXEL_ORDER_XRGB 2 #define HVS_PIXEL_ORDER_XBGR 3 +/* For YCbCr modes (8-12, and 17) */ #define HVS_PIXEL_ORDER_XYCBCR 0 #define HVS_PIXEL_ORDER_XYCRCB 1 #define HVS_PIXEL_ORDER_YXCBCR 2 -- cgit v1.2.3 From 273c417658c83026741ded0c34cec9caab41e97f Mon Sep 17 00:00:00 2001 From: Mateusz Kwiatkowski Date: Wed, 7 Dec 2022 12:53:24 +0100 Subject: drm/vc4: crtc: Fix timings for VEC modes This commit fixes vertical timings of the VEC (composite output) modes to accurately represent the 525-line ("NTSC") and 625-line ("PAL") ITU-R standards. Previous timings were actually defined as 502 and 601 lines, resulting in non-standard 62.69 Hz and 52 Hz signals being generated, respectively. Changes to vc4_crtc.c have also been made, to make the PixelValve vertical timings accurately correspond to the DRM modeline in interlaced modes. The resulting VERTA/VERTB register values have been verified against the reference values set by the Raspberry Pi firmware. Signed-off-by: Mateusz Kwiatkowski Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-13-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_crtc.c | 71 ++++++++++++++++++++++++++---------------- 1 file changed, 44 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index 35a6b5907278..cdc0559221f0 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -335,8 +335,14 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc, struct drm_encoder *encode bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 || vc4_encoder->type == VC4_ENCODER_TYPE_DSI1); bool is_dsi1 = vc4_encoder->type == VC4_ENCODER_TYPE_DSI1; + bool is_vec = vc4_encoder->type == VC4_ENCODER_TYPE_VEC; u32 format = is_dsi1 ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24; u8 ppc = pv_data->pixels_per_clock; + + u16 vert_bp = mode->crtc_vtotal - mode->crtc_vsync_end; + u16 vert_sync = mode->crtc_vsync_end - mode->crtc_vsync_start; + u16 vert_fp = mode->crtc_vsync_start - mode->crtc_vdisplay; + bool debug_dump_regs = false; int idx; @@ -364,49 +370,60 @@ static void vc4_crtc_config_pv(struct drm_crtc *crtc, struct drm_encoder *encode VC4_SET_FIELD(mode->hdisplay * pixel_rep / ppc, PV_HORZB_HACTIVE)); - CRTC_WRITE(PV_VERTA, - VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end + - interlace, - PV_VERTA_VBP) | - VC4_SET_FIELD(mode->crtc_vsync_end - mode->crtc_vsync_start, - PV_VERTA_VSYNC)); - CRTC_WRITE(PV_VERTB, - VC4_SET_FIELD(mode->crtc_vsync_start - mode->crtc_vdisplay, - PV_VERTB_VFP) | - VC4_SET_FIELD(mode->crtc_vdisplay, PV_VERTB_VACTIVE)); - if (interlace) { + bool odd_field_first = false; + u32 field_delay = mode->htotal * pixel_rep / (2 * ppc); + u16 vert_bp_even = vert_bp; + u16 vert_fp_even = vert_fp; + + if (is_vec) { + /* VEC (composite output) */ + ++field_delay; + if (mode->htotal == 858) { + /* 525-line mode (NTSC or PAL-M) */ + odd_field_first = true; + } + } + + if (odd_field_first) + ++vert_fp_even; + else + ++vert_bp; + CRTC_WRITE(PV_VERTA_EVEN, - VC4_SET_FIELD(mode->crtc_vtotal - - mode->crtc_vsync_end, - PV_VERTA_VBP) | - VC4_SET_FIELD(mode->crtc_vsync_end - - mode->crtc_vsync_start, - PV_VERTA_VSYNC)); + VC4_SET_FIELD(vert_bp_even, PV_VERTA_VBP) | + VC4_SET_FIELD(vert_sync, PV_VERTA_VSYNC)); CRTC_WRITE(PV_VERTB_EVEN, - VC4_SET_FIELD(mode->crtc_vsync_start - - mode->crtc_vdisplay, - PV_VERTB_VFP) | + VC4_SET_FIELD(vert_fp_even, PV_VERTB_VFP) | VC4_SET_FIELD(mode->crtc_vdisplay, PV_VERTB_VACTIVE)); - /* We set up first field even mode for HDMI. VEC's - * NTSC mode would want first field odd instead, once - * we support it (to do so, set ODD_FIRST and put the - * delay in VSYNCD_EVEN instead). + /* We set up first field even mode for HDMI and VEC's PAL. + * For NTSC, we need first field odd. */ CRTC_WRITE(PV_V_CONTROL, PV_VCONTROL_CONTINUOUS | (is_dsi ? PV_VCONTROL_DSI : 0) | PV_VCONTROL_INTERLACE | - VC4_SET_FIELD(mode->htotal * pixel_rep / (2 * ppc), - PV_VCONTROL_ODD_DELAY)); - CRTC_WRITE(PV_VSYNCD_EVEN, 0); + (odd_field_first + ? PV_VCONTROL_ODD_FIRST + : VC4_SET_FIELD(field_delay, + PV_VCONTROL_ODD_DELAY))); + CRTC_WRITE(PV_VSYNCD_EVEN, + (odd_field_first ? field_delay : 0)); } else { CRTC_WRITE(PV_V_CONTROL, PV_VCONTROL_CONTINUOUS | (is_dsi ? PV_VCONTROL_DSI : 0)); + CRTC_WRITE(PV_VSYNCD_EVEN, 0); } + CRTC_WRITE(PV_VERTA, + VC4_SET_FIELD(vert_bp, PV_VERTA_VBP) | + VC4_SET_FIELD(vert_sync, PV_VERTA_VSYNC)); + CRTC_WRITE(PV_VERTB, + VC4_SET_FIELD(vert_fp, PV_VERTB_VFP) | + VC4_SET_FIELD(mode->crtc_vdisplay, PV_VERTB_VACTIVE)); + if (is_dsi) CRTC_WRITE(PV_HACT_ACT, mode->hdisplay * pixel_rep); -- cgit v1.2.3 From 771d6539f27bd55f43d8a95d53a7eeaaffa2681c Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Wed, 7 Dec 2022 12:53:25 +0100 Subject: drm/vc4: hdmi: Correct interlaced timings again The back porch timings were correct, only the sync offset was wrong. Correct timing is now reported for 1080i and 576i, but the h offset is incorrect for 480i for non-obvious reasons. Fixes: fb10dc451c0f ("drm/vc4: hdmi: Correct HDMI timing registers for interlaced modes") Signed-off-by: Dave Stevenson Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-14-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_hdmi.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index dfb7f41b28df..14628864487a 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -1307,11 +1307,12 @@ static void vc5_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi, VC4_SET_FIELD(mode->crtc_vdisplay, VC5_HDMI_VERTA_VAL)); u32 vertb = (VC4_SET_FIELD(mode->htotal >> (2 - pixel_rep), VC5_HDMI_VERTB_VSPO) | - VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end, + VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end + + interlaced, VC4_HDMI_VERTB_VBP)); u32 vertb_even = (VC4_SET_FIELD(0, VC5_HDMI_VERTB_VSPO) | VC4_SET_FIELD(mode->crtc_vtotal - - mode->crtc_vsync_end - interlaced, + mode->crtc_vsync_end, VC4_HDMI_VERTB_VBP)); unsigned long flags; unsigned char gcp; -- cgit v1.2.3 From 71c541ebe82b26720b3e3f02ff22ed1eccea3484 Mon Sep 17 00:00:00 2001 From: Mateusz Kwiatkowski Date: Wed, 7 Dec 2022 12:53:26 +0100 Subject: drm/vc4: vec: Support progressive modes The VEC is able to output progressive analog modes, but the driver has never set the proper bit to do so. Signed-off-by: Mateusz Kwiatkowski Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-15-1f8e0770798b@cerno.tech Signed-off-by: Maxime Ripard --- drivers/gpu/drm/vc4/vc4_vec.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c index d8bf00b442e9..a3782d05cd66 100644 --- a/drivers/gpu/drm/vc4/vc4_vec.c +++ b/drivers/gpu/drm/vc4/vc4_vec.c @@ -613,7 +613,9 @@ static void vc4_vec_encoder_enable(struct drm_encoder *encoder, VEC_WRITE(VEC_CLMP0_START, 0xac); VEC_WRITE(VEC_CLMP0_END, 0xec); VEC_WRITE(VEC_CONFIG2, - VEC_CONFIG2_UV_DIG_DIS | VEC_CONFIG2_RGB_DIG_DIS); + VEC_CONFIG2_UV_DIG_DIS | + VEC_CONFIG2_RGB_DIG_DIS | + ((adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) ? 0 : VEC_CONFIG2_PROG_SCAN)); VEC_WRITE(VEC_CONFIG3, VEC_CONFIG3_HORIZ_LEN_STD); VEC_WRITE(VEC_DAC_CONFIG, vec->variant->dac_config); -- cgit v1.2.3 From ef85db911134d103a7f713eae6689dbb15c3f96a Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 9 Jan 2023 09:49:29 +0100 Subject: dt-bindings: display: panel: document the Visionox VTDR6130 AMOLED DSI Panel Document the 1080x2400 Visionox VTDR6130 AMOLED DSI Panel bindings. Reviewed-by: Sam Ravnborg Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong [narmstrong: drop last, redundant "bindings" in subject] Link: https://patchwork.freedesktop.org/patch/msgid/20230103-topic-sm8550-upstream-vtdr6130-panel-v2-1-dd6200f47a76@linaro.org --- .../bindings/display/panel/visionox,vtdr6130.yaml | 53 ++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml diff --git a/Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml b/Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml new file mode 100644 index 000000000000..49e2fd4b4e99 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/visionox,vtdr6130.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Visionox VTDR6130 AMOLED DSI Panel + +maintainers: + - Neil Armstrong + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: visionox,vtdr6130 + + vddio-supply: true + vci-supply: true + vdd-supply: true + port: true + reset-gpios: true + +additionalProperties: false + +required: + - compatible + - vddio-supply + - vci-supply + - vdd-supply + - reset-gpios + - port + +examples: + - | + #include + panel { + compatible = "visionox,vtdr6130"; + + vddio-supply = <&vreg_l12b_1p8>; + vci-supply = <&vreg_l13b_3p0>; + vdd-supply = <&vreg_l11b_1p2>; + + reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; + + port { + panel0_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; +... -- cgit v1.2.3 From 2349183d32d83a7635baa804934813bcad13fd62 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 9 Jan 2023 09:49:30 +0100 Subject: drm/panel: add visionox vtdr6130 DSI panel driver Add support for the 1080x2400 Visionox VTDR6130 AMOLED DSI panel found on the Qualcomm SM8550 MTP board. By default the the panel is configured to work with DSI compressed streams, but can work in uncompressed video mode since 1080x2400 in RGB888 fits in the 4 DSI lanes bandwidth. While display compression is preferred for performance and power reasons, let's start with the uncompressed video mode support and add the DSC support later on. Reviewed-by: Sam Ravnborg Signed-off-by: Neil Armstrong [narmstrong: moved drm/display/ include file before drm/drm_] Link: https://patchwork.freedesktop.org/patch/msgid/20230103-topic-sm8550-upstream-vtdr6130-panel-v2-2-dd6200f47a76@linaro.org --- drivers/gpu/drm/panel/Kconfig | 8 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-visionox-vtdr6130.c | 358 ++++++++++++++++++++++++ 3 files changed, 367 insertions(+) create mode 100644 drivers/gpu/drm/panel/panel-visionox-vtdr6130.c diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 114758f64d26..b267024a90ec 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -726,6 +726,14 @@ config DRM_PANEL_VISIONOX_RM69299 Say Y here if you want to enable support for Visionox RM69299 DSI Video Mode panel. +config DRM_PANEL_VISIONOX_VTDR6130 + tristate "Visionox VTDR6130" + depends on OF + depends on DRM_MIPI_DSI + help + Say Y here if you want to enable support for Visionox + VTDR6130 1080x2400 AMOLED DSI panel. + config DRM_PANEL_WIDECHIPS_WS2401 tristate "Widechips WS2401 DPI panel driver" depends on SPI && GPIOLIB diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index ddcf8df889c8..bc152a5fe904 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -74,5 +74,6 @@ obj-$(CONFIG_DRM_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o obj-$(CONFIG_DRM_PANEL_TPO_TPG110) += panel-tpo-tpg110.o obj-$(CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA) += panel-truly-nt35597.o obj-$(CONFIG_DRM_PANEL_VISIONOX_RM69299) += panel-visionox-rm69299.o +obj-$(CONFIG_DRM_PANEL_VISIONOX_VTDR6130) += panel-visionox-vtdr6130.o obj-$(CONFIG_DRM_PANEL_WIDECHIPS_WS2401) += panel-widechips-ws2401.o obj-$(CONFIG_DRM_PANEL_XINPENG_XPP055C272) += panel-xinpeng-xpp055c272.o diff --git a/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c b/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c new file mode 100644 index 000000000000..f9a6abc1e121 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-visionox-vtdr6130.c @@ -0,0 +1,358 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright (c) 2023, Linaro Limited + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include