From b66bd0e4d00c89102851c1bc9a0f738a4ad9ca2d Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Fri, 14 Feb 2014 13:27:07 +0100 Subject: mmc: core: Add DT bindings for SD card's UHS bus speed modes Provide the option to configure these speed modes per host, for those host driver's that can't distinguish this in runtime. Signed-off-by: Ulf Hansson Acked-by: Jaehoon Chung Signed-off-by: Chris Ball --- Documentation/devicetree/bindings/mmc/mmc.txt | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt b/Documentation/devicetree/bindings/mmc/mmc.txt index 458b57f199af..bd2ce67dbb9e 100644 --- a/Documentation/devicetree/bindings/mmc/mmc.txt +++ b/Documentation/devicetree/bindings/mmc/mmc.txt @@ -26,6 +26,11 @@ Optional properties: this system, even if the controller claims it is. - cap-sd-highspeed: SD high-speed timing is supported - cap-mmc-highspeed: MMC high-speed timing is supported +- sd-uhs-sdr12: SD UHS SDR12 speed is supported +- sd-uhs-sdr25: SD UHS SDR25 speed is supported +- sd-uhs-sdr50: SD UHS SDR50 speed is supported +- sd-uhs-sdr104: SD UHS SDR104 speed is supported +- sd-uhs-ddr50: SD UHS DDR50 speed is supported - cap-power-off-card: powering off the card is safe - cap-sdio-irq: enable SDIO IRQ signalling on this interface - full-pwr-cycle: full power cycle of the card is supported -- cgit v1.2.3 From c0baf8485928b2db8a9530672d522d758746a2b6 Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Fri, 14 Feb 2014 13:27:08 +0100 Subject: mmc: core: Add DT bindings for eMMC high-speed DDR 1.8/1.2V Provide the option to configure these speed modes per host, for those host driver's that can't distinguish this in runtime. Signed-off-by: Ulf Hansson Acked-by: Jaehoon Chung Signed-off-by: Chris Ball --- Documentation/devicetree/bindings/mmc/mmc.txt | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt b/Documentation/devicetree/bindings/mmc/mmc.txt index bd2ce67dbb9e..519d9523a413 100644 --- a/Documentation/devicetree/bindings/mmc/mmc.txt +++ b/Documentation/devicetree/bindings/mmc/mmc.txt @@ -34,6 +34,8 @@ Optional properties: - cap-power-off-card: powering off the card is safe - cap-sdio-irq: enable SDIO IRQ signalling on this interface - full-pwr-cycle: full power cycle of the card is supported +- mmc-highspeed-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported +- mmc-highspeed-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported *NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line polarity properties, we have to fix the meaning of the "normal" and "inverted" -- cgit v1.2.3 From 321bd41de1580f953c637de0fd81e06fcba8b3e8 Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Fri, 14 Feb 2014 13:27:09 +0100 Subject: mmc: core: Add DT bindings for eMMC HS200 1.8/1.2V Provide the option to configure these speed modes per host, for those host driver's that can't distinguish this in runtime. Signed-off-by: Jaehoon Chung Acked-by: Ulf Hansson Signed-off-by: Chris Ball --- Documentation/devicetree/bindings/mmc/mmc.txt | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt b/Documentation/devicetree/bindings/mmc/mmc.txt index 519d9523a413..9dce540771fb 100644 --- a/Documentation/devicetree/bindings/mmc/mmc.txt +++ b/Documentation/devicetree/bindings/mmc/mmc.txt @@ -36,6 +36,8 @@ Optional properties: - full-pwr-cycle: full power cycle of the card is supported - mmc-highspeed-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported - mmc-highspeed-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported +- mmc-hs200-1_8v: eMMC HS200 mode(1.8V I/O) is supported +- mmc-hs200-1_2v: eMMC HS200 mode(1.2V I/O) is supported *NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line polarity properties, we have to fix the meaning of the "normal" and "inverted" -- cgit v1.2.3 From d9c3f5df539a8a74cc830b35838670fe0541fed1 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Mon, 17 Feb 2014 20:31:02 -0600 Subject: dts: socfpga: Add support for SD/MMC on the SOCFPGA platform Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform specific implementation of the dw_mmc driver. Also add the "syscon" binding to the "altr,sys-mgr" node. The clock driver can use the syscon driver to toggle the register for the SD/MMC clock phase shift settings. Finally, fix an indentation error for the sysmgr node. Signed-off-by: Dinh Nguyen Acked-by: Steffen Trumtrar Tested-by: Steffen Trumtrar Signed-off-by: Chris Ball --- .../devicetree/bindings/mmc/socfpga-dw-mshc.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt new file mode 100644 index 000000000000..4897bea7e3f8 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt @@ -0,0 +1,23 @@ +* Altera SOCFPGA specific extensions to the Synopsys Designware Mobile + Storage Host Controller + +The Synopsys designware mobile storage host controller is used to interface +a SoC with storage medium such as eMMC or SD/MMC cards. This file documents +differences between the core Synopsys dw mshc controller properties described +by synopsys-dw-mshc.txt and the properties used by the Altera SOCFPGA specific +extensions to the Synopsys Designware Mobile Storage Host Controller. + +Required Properties: + +* compatible: should be + - "altr,socfpga-dw-mshc": for Altera's SOCFPGA platform + +Example: + + mmc: dwmmc0@ff704000 { + compatible = "altr,socfpga-dw-mshc"; + reg = <0xff704000 0x1000>; + interrupts = <0 129 4>; + #address-cells = <1>; + #size-cells = <0>; + }; -- cgit v1.2.3 From 59445b10d08144d870d8340ce25634014bf972d5 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Thu, 13 Feb 2014 23:45:48 -0600 Subject: mmc: omap_hsmmc: Add support for quirky omap3 hsmmc controller When device is booted using devicetree, platforms impacted by Erratum 2.1.1.128 is not detected easily in the mmc driver. This erratum indicates that the module cannot do multi-block transfers. Platforms such as LDP which use OMAP3 ES revision prior to ES3.0 are impacted by this. Provide a new compatible property "ti,omap3-pre-es3-hsmmc" to allow driver to determine if driver needs to implement quirks associated with the specific module version (primarily because the IP revision information is not sufficient for the same). Signed-off-by: Nishanth Menon Acked-by: Tony Lindgren Acked-by: Balaji T K Signed-off-by: Chris Ball --- Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt index 8c8908ab84ba..ce8056116fb0 100644 --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt @@ -10,6 +10,7 @@ Required properties: - compatible: Should be "ti,omap2-hsmmc", for OMAP2 controllers Should be "ti,omap3-hsmmc", for OMAP3 controllers + Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0 Should be "ti,omap4-hsmmc", for OMAP4 controllers - ti,hwmods: Must be "mmc", n is controller instance starting 1 -- cgit v1.2.3 From 11469e0bb1c5eedd3b489a4b19dbd26c02577674 Mon Sep 17 00:00:00 2001 From: Balaji T K Date: Wed, 19 Feb 2014 20:26:40 +0530 Subject: regulator: add pbias regulator support pbias register controls internal power supply to sd card i/o pads in most OMAPs (OMAP2-5, DRA7). Control bits for selecting voltage level and enabling/disabling are in the same PBIAS register. Signed-off-by: Balaji T K Acked-by: Tony Lindgren Acked-by: Mark Brown Tested-by: Florian Vaussard Tested-by: Stefan Roese Signed-off-by: Chris Ball --- .../bindings/regulator/pbias-regulator.txt | 27 ++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/pbias-regulator.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/regulator/pbias-regulator.txt b/Documentation/devicetree/bindings/regulator/pbias-regulator.txt new file mode 100644 index 000000000000..32aa26f1e434 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/pbias-regulator.txt @@ -0,0 +1,27 @@ +PBIAS internal regulator for SD card dual voltage i/o pads on OMAP SoCs. + +Required properties: +- compatible: + - "ti,pbias-omap" for OMAP2, OMAP3, OMAP4, OMAP5, DRA7. +- reg: pbias register offset from syscon base and size of pbias register. +- syscon : phandle of the system control module +- regulator-name : should be + pbias_mmc_omap2430 for OMAP2430, OMAP3 SoCs + pbias_sim_omap3 for OMAP3 SoCs + pbias_mmc_omap4 for OMAP4 SoCs + pbias_mmc_omap5 for OMAP5 and DRA7 SoC + +Optional properties: +- Any optional property defined in bindings/regulator/regulator.txt + +Example: + + pbias_regulator: pbias_regulator { + compatible = "ti,pbias-omap"; + reg = <0 0x4>; + syscon = <&omap5_padconf_global>; + pbias_mmc_reg: pbias_mmc_omap5 { + regulator-name = "pbias_mmc_omap5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + }; -- cgit v1.2.3 From 2b5cc85135279c3504c72ab51bd089d102a2f8e9 Mon Sep 17 00:00:00 2001 From: Chris Ball Date: Mon, 17 Mar 2014 09:04:57 -0400 Subject: Revert "dts: socfpga: Add support for SD/MMC on the SOCFPGA platform" This reverts commit d9c3f5df539a8a74cc830b35838670fe0541fed1, which should not have been merged via mmc-next. It's in arm-soc instead now. --- .../devicetree/bindings/mmc/socfpga-dw-mshc.txt | 23 ---------------------- 1 file changed, 23 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt deleted file mode 100644 index 4897bea7e3f8..000000000000 --- a/Documentation/devicetree/bindings/mmc/socfpga-dw-mshc.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Altera SOCFPGA specific extensions to the Synopsys Designware Mobile - Storage Host Controller - -The Synopsys designware mobile storage host controller is used to interface -a SoC with storage medium such as eMMC or SD/MMC cards. This file documents -differences between the core Synopsys dw mshc controller properties described -by synopsys-dw-mshc.txt and the properties used by the Altera SOCFPGA specific -extensions to the Synopsys Designware Mobile Storage Host Controller. - -Required Properties: - -* compatible: should be - - "altr,socfpga-dw-mshc": for Altera's SOCFPGA platform - -Example: - - mmc: dwmmc0@ff704000 { - compatible = "altr,socfpga-dw-mshc"; - reg = <0xff704000 0x1000>; - interrupts = <0 129 4>; - #address-cells = <1>; - #size-cells = <0>; - }; -- cgit v1.2.3 From d2529500813c77db1d0fc9d23da0de05486859d8 Mon Sep 17 00:00:00 2001 From: Georgi Djakov Date: Mon, 10 Mar 2014 17:37:11 +0200 Subject: mmc: sdhci-msm: Qualcomm SDHCI binding documentation This patch adds the device-tree binding documentation for Qualcomm SDHCI driver. It contains the differences between the core properties in mmc.txt and the properties used by the sdhci-msm driver. Signed-off-by: Georgi Djakov Acked-by: Ulf Hansson Signed-off-by: Chris Ball --- .../devicetree/bindings/mmc/sdhci-msm.txt | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-msm.txt (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt new file mode 100644 index 000000000000..81b33b5b20fc --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt @@ -0,0 +1,55 @@ +* Qualcomm SDHCI controller (sdhci-msm) + +This file documents differences between the core properties in mmc.txt +and the properties used by the sdhci-msm driver. + +Required properties: +- compatible: Should contain "qcom,sdhci-msm-v4". +- reg: Base address and length of the register in the following order: + - Host controller register map (required) + - SD Core register map (required) +- interrupts: Should contain an interrupt-specifiers for the interrupts: + - Host controller interrupt (required) +- pinctrl-names: Should contain only one value - "default". +- pinctrl-0: Should specify pin control groups used for this controller. +- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock-names. +- clock-names: Should contain the following: + "iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required) + "core" - SDC MMC clock (MCLK) (required) + "bus" - SDCC bus voter clock (optional) + +Example: + + sdhc_1: sdhci@f9824900 { + compatible = "qcom,sdhci-msm-v4"; + reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; + interrupts = <0 123 0>; + bus-width = <8>; + non-removable; + + vmmc = <&pm8941_l20>; + vqmmc = <&pm8941_s3>; + + pinctrl-names = "default"; + pinctrl-0 = <&sdc1_clk &sdc1_cmd &sdc1_data>; + + clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>; + clock-names = "core", "iface"; + }; + + sdhc_2: sdhci@f98a4900 { + compatible = "qcom,sdhci-msm-v4"; + reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; + interrupts = <0 125 0>; + bus-width = <4>; + cd-gpios = <&msmgpio 62 0x1>; + + vmmc = <&pm8941_l21>; + vqmmc = <&pm8941_l13>; + + pinctrl-names = "default"; + pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data>; + + clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; + clock-names = "core", "iface"; + }; -- cgit v1.2.3 From 5491ce3f79eed79f68fcc2dc4c10aeafe00215a6 Mon Sep 17 00:00:00 2001 From: Marcin Wojtas Date: Tue, 18 Feb 2014 16:08:29 +0100 Subject: mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller The SDHCI unit used on the Armada 380 and 385 Marvell SoC is similar to the PXAv3 unit. The only difference is that on Armada 38x, the PXAv3 unit accesses memory through MBus windows which must be configured prior to using the device. Without this, DMA would not work. In order to achieve this, the sdhci-pxav3 driver is extended with an additional compatible string "marvell,armada-380-sdhci". When this compatible string is used, the MBus windows are initialized in a way that is identical to what all other DMA-capable drivers for Marvell EBU platforms do. Signed-off-by: Marcin Wojtas Signed-off-by: Thomas Petazzoni Signed-off-by: Chris Ball --- Documentation/devicetree/bindings/mmc/sdhci-pxa.txt | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt b/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt index dbe98a3c183a..86223c3eda90 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt @@ -4,7 +4,14 @@ This file documents differences between the core properties in mmc.txt and the properties used by the sdhci-pxav2 and sdhci-pxav3 drivers. Required properties: -- compatible: Should be "mrvl,pxav2-mmc" or "mrvl,pxav3-mmc". +- compatible: Should be "mrvl,pxav2-mmc", "mrvl,pxav3-mmc" or + "marvell,armada-380-sdhci". +- reg: + * for "mrvl,pxav2-mmc" and "mrvl,pxav3-mmc", one register area for + the SDHCI registers. + * for "marvell,armada-380-sdhci", two register areas. The first one + for the SDHCI registers themselves, and the second one for the + AXI/Mbus bridge registers of the SDHCI unit. Optional properties: - mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning. @@ -19,3 +26,11 @@ sdhci@d4280800 { non-removable; mrvl,clk-delay-cycles = <31>; }; + +sdhci@d8000 { + compatible = "marvell,armada-380-sdhci"; + reg = <0xd8000 0x1000>, <0xdc000 0x100>; + interrupts = <0 25 0x4>; + clocks = <&gateclk 17>; + mrvl,clk-delay-cycles = <0x1F>; +}; -- cgit v1.2.3