From f1949ea0d1f6034d38ce20089980b6b26d527c25 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 8 Mar 2012 09:02:02 +0000 Subject: ARM: ux500: Enable PL310 Level 2 Cache Controller in Device Tree This provides PL310 Level 2 Cache Controller Device Tree support for all u8500 based devices. Acked-by: Linus Walleij Signed-off-by: Lee Jones Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/db8500.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi index 614a471df4a7..ce3b56fb9132 100644 --- a/arch/arm/boot/dts/db8500.dtsi +++ b/arch/arm/boot/dts/db8500.dtsi @@ -29,6 +29,14 @@ <0xa0410100 0x100>; }; + L2: l2-cache { + compatible = "arm,pl310-cache"; + reg = <0xa0412000 0x1000>; + interrupts = <0 13 4>; + cache-unified; + cache-level = <2>; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <0 7 0x4>; -- cgit v1.2.3