From bfdad565ae0a61ac943974b8ae61ec0ed55ceb04 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Simon=20K=C3=A5gstr=C3=B6m?= Date: Mon, 17 Mar 2014 14:42:35 +0100 Subject: ARM: ixp4xx: Make dma_set_coherent_mask common, correct implementation Non-PCI devices can use the entire 32-bit range, PCI dittos are limited to the first 64MiB. Also actually setup coherent_dma_mask. The patch has been verified on a board with 128MiB memory, one ipx4xx_eth device and a e100 PCI device. Signed-off-by: Simon Kagstrom Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/common-pci.c | 9 --------- arch/arm/mach-ixp4xx/common.c | 12 ++++++++++++ 2 files changed, 12 insertions(+), 9 deletions(-) (limited to 'arch/arm/mach-ixp4xx') diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 200970d56f6d..055d81694a17 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -481,14 +481,5 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys) return 1; } -int dma_set_coherent_mask(struct device *dev, u64 mask) -{ - if (mask >= SZ_64M - 1) - return 0; - - return -EIO; -} - EXPORT_SYMBOL(ixp4xx_pci_read); EXPORT_SYMBOL(ixp4xx_pci_write); -EXPORT_SYMBOL(dma_set_coherent_mask); diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 6d68aed6548a..df82a2b4a546 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -578,6 +579,17 @@ void ixp4xx_restart(enum reboot_mode mode, const char *cmd) } } +int dma_set_coherent_mask(struct device *dev, u64 mask) +{ + if (dev_is_pci(dev) && mask >= SZ_64M) + return -EIO; + + dev->coherent_dma_mask = mask; + + return 0; +} +EXPORT_SYMBOL(dma_set_coherent_mask); + #ifdef CONFIG_IXP4XX_INDIRECT_PCI /* * In the case of using indirect PCI, we simply return the actual PCI -- cgit v1.2.3 From e9c610a49bf7b0f9e2bf231e762b2e82dcbdc63a Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 15 Mar 2014 11:52:49 +0100 Subject: ARM: ixp4xx/omixp: always include linux/leds.h The omixp board code unconditionally defines a gpio-led device, but for some reason includes the header file for this only if CONFIG_LEDS_CLASS is enabled, causing a build error otherwise. Removing the #ifdef fixes the build error with no downsides whatsoever. Signed-off-by: Arnd Bergmann Cc: Imre Kaloz Cc: Krzysztof Halasa --- arch/arm/mach-ixp4xx/omixp-setup.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/mach-ixp4xx') diff --git a/arch/arm/mach-ixp4xx/omixp-setup.c b/arch/arm/mach-ixp4xx/omixp-setup.c index 75ef03dc9964..2d494b454376 100644 --- a/arch/arm/mach-ixp4xx/omixp-setup.c +++ b/arch/arm/mach-ixp4xx/omixp-setup.c @@ -17,9 +17,7 @@ #include #include #include -#ifdef CONFIG_LEDS_CLASS #include -#endif #include #include -- cgit v1.2.3 From 926aabde6318db321eb982ded8f5f63cd52fee74 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sun, 16 Mar 2014 20:23:18 +0100 Subject: ARM: ixp4xx: avoid use of PCIBIOS_MIN_MEM in io.h When using CONFIG_IXP4XX_INDIRECT_PCI, we run into a recursive header file dependency between mach/io.h and asm/pci.h, resulting in a build failure: mach-ixp4xx/include/mach/io.h: In function 'is_pci_memory': mach-ixp4xx/include/mach/io.h:53:18: error: 'PCIBIOS_MIN_MEM' undeclared (first use in this function) return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF); ^ mach-ixp4xx/include/mach/io.h:53:18: note: each undeclared identifier is reported only once for each function it appears in We can work around this by referencing the pcibios_min_mem variable directly through an extern declaration, rather than using the macro. Signed-off-by: Arnd Bergmann Cc: Imre Kaloz Cc: Krzysztof Halasa --- arch/arm/mach-ixp4xx/include/mach/io.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-ixp4xx') diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h index 5cf30d1b78d2..559c69a47731 100644 --- a/arch/arm/mach-ixp4xx/include/mach/io.h +++ b/arch/arm/mach-ixp4xx/include/mach/io.h @@ -48,9 +48,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); * fallback to the default. */ +extern unsigned long pcibios_min_mem; static inline int is_pci_memory(u32 addr) { - return (addr >= PCIBIOS_MIN_MEM) && (addr <= 0x4FFFFFFF); + return (addr >= pcibios_min_mem) && (addr <= 0x4FFFFFFF); } #define writeb(v, p) __indirect_writeb(v, p) -- cgit v1.2.3 From 48ba81f6fdb7580a5c474da1b14a338e1358e6ab Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 3 Feb 2014 17:40:14 +0100 Subject: ARM: ixp4xx: fix gpio rework Commit 098e30f6558f8 "ARM: ixp4xx: stop broadcasting the custom GPIO API" changed the internal gpio code of ixp4xx to be accessible only from common.c, but unfortunately that broke the Goramo MultiLink code, which uses this API. This tries to restore the previous state without exposing the API globally again. A better solution might be needed. Signed-off-by: Arnd Bergmann Cc: Linus Walleij Cc: Krzysztof Halasa Cc: Imre Kaloz --- arch/arm/mach-ixp4xx/common.c | 6 +++--- arch/arm/mach-ixp4xx/goramo_mlr.c | 7 +++++++ 2 files changed, 10 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-ixp4xx') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 6d68aed6548a..c751f2f35668 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -99,7 +99,7 @@ void __init ixp4xx_map_io(void) #define IXP4XX_GPIO_CLK_0 14 #define IXP4XX_GPIO_CLK_1 15 -static void gpio_line_config(u8 line, u32 direction) +void gpio_line_config(u8 line, u32 direction) { if (direction == IXP4XX_GPIO_IN) *IXP4XX_GPIO_GPOER |= (1 << line); @@ -107,12 +107,12 @@ static void gpio_line_config(u8 line, u32 direction) *IXP4XX_GPIO_GPOER &= ~(1 << line); } -static void gpio_line_get(u8 line, int *value) +void gpio_line_get(u8 line, int *value) { *value = (*IXP4XX_GPIO_GPINR >> line) & 0x1; } -static void gpio_line_set(u8 line, int value) +void gpio_line_set(u8 line, int value) { if (value == IXP4XX_GPIO_HIGH) *IXP4XX_GPIO_GPOUTR |= (1 << line); diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c index e54ff491c105..5a635c657ea2 100644 --- a/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/arch/arm/mach-ixp4xx/goramo_mlr.c @@ -17,6 +17,13 @@ #include #include +#define IXP4XX_GPIO_OUT 0x1 +#define IXP4XX_GPIO_IN 0x2 + +void gpio_line_config(u8 line, u32 direction); +void gpio_line_get(u8 line, int *value); +void gpio_line_set(u8 line, int value); + #define SLOT_ETHA 0x0B /* IDSEL = AD21 */ #define SLOT_ETHB 0x0C /* IDSEL = AD20 */ #define SLOT_MPCI 0x0D /* IDSEL = AD19 */ -- cgit v1.2.3 From 9c9c6c55a887dfe4e68d48d0829e412ed4f14ca9 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 26 Mar 2014 23:03:09 +0100 Subject: Revert "ARM: ixp4xx: fix gpio rework" This reverts commit 48ba81f6fdb7580a5c474da1b14a338e1358e6ab. A better fix was sent by Krzysztof Halasa. Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/common.c | 6 +++--- arch/arm/mach-ixp4xx/goramo_mlr.c | 7 ------- 2 files changed, 3 insertions(+), 10 deletions(-) (limited to 'arch/arm/mach-ixp4xx') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index eef39c7ad0cf..df82a2b4a546 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -100,7 +100,7 @@ void __init ixp4xx_map_io(void) #define IXP4XX_GPIO_CLK_0 14 #define IXP4XX_GPIO_CLK_1 15 -void gpio_line_config(u8 line, u32 direction) +static void gpio_line_config(u8 line, u32 direction) { if (direction == IXP4XX_GPIO_IN) *IXP4XX_GPIO_GPOER |= (1 << line); @@ -108,12 +108,12 @@ void gpio_line_config(u8 line, u32 direction) *IXP4XX_GPIO_GPOER &= ~(1 << line); } -void gpio_line_get(u8 line, int *value) +static void gpio_line_get(u8 line, int *value) { *value = (*IXP4XX_GPIO_GPINR >> line) & 0x1; } -void gpio_line_set(u8 line, int value) +static void gpio_line_set(u8 line, int value) { if (value == IXP4XX_GPIO_HIGH) *IXP4XX_GPIO_GPOUTR |= (1 << line); diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c index 5a635c657ea2..e54ff491c105 100644 --- a/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/arch/arm/mach-ixp4xx/goramo_mlr.c @@ -17,13 +17,6 @@ #include #include -#define IXP4XX_GPIO_OUT 0x1 -#define IXP4XX_GPIO_IN 0x2 - -void gpio_line_config(u8 line, u32 direction); -void gpio_line_get(u8 line, int *value); -void gpio_line_set(u8 line, int value); - #define SLOT_ETHA 0x0B /* IDSEL = AD21 */ #define SLOT_ETHB 0x0C /* IDSEL = AD20 */ #define SLOT_MPCI 0x0D /* IDSEL = AD19 */ -- cgit v1.2.3 From e1a4018f939e9ff51712183c1fdc6775e5f181a1 Mon Sep 17 00:00:00 2001 From: Krzysztof Halasa Date: Sun, 23 Mar 2014 01:34:16 +0100 Subject: IXP4xx: Fix Goramo Multilink GPIO conversion. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 098e30f6558f8 "ARM: ixp4xx: stop broadcasting the custom GPIO API" changed the internal gpio code of ixp4xx to be accessible only from common.c, but unfortunately that broke the Goramo MultiLink code, which uses this API. arch/arm/mach-ixp4xx/goramo_mlr.c: In function 'set_scl': arch/arm/mach-ixp4xx/goramo_mlr.c:82: error: implicit declaration of function 'gpio_line_set' arch/arm/mach-ixp4xx/goramo_mlr.c: In function 'output_control': arch/arm/mach-ixp4xx/goramo_mlr.c:111: error: implicit declaration of function 'gpio_line_config' arch/arm/mach-ixp4xx/goramo_mlr.c:111: error: 'IXP4XX_GPIO_OUT' undeclared arch/arm/mach-ixp4xx/goramo_mlr.c: In function 'hss_dcd_irq': arch/arm/mach-ixp4xx/goramo_mlr.c:155: error: implicit declaration of function 'gpio_line_get' arch/arm/mach-ixp4xx/goramo_mlr.c: In function 'gmlr_init': arch/arm/mach-ixp4xx/goramo_mlr.c:416: error: 'IXP4XX_GPIO_OUT' undeclared arch/arm/mach-ixp4xx/goramo_mlr.c:421: error: 'IXP4XX_GPIO_IN' undeclared Signed-off-by: Krzysztof Hałasa Reviewed-by: Linus Walleij Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/goramo_mlr.c | 43 +++++++++++++++++++++++---------------- 1 file changed, 26 insertions(+), 17 deletions(-) (limited to 'arch/arm/mach-ixp4xx') diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c index e54ff491c105..80bd9d6d04de 100644 --- a/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/arch/arm/mach-ixp4xx/goramo_mlr.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -79,19 +80,19 @@ static u8 control_value; static void set_scl(u8 value) { - gpio_line_set(GPIO_SCL, !!value); + gpio_set_value(GPIO_SCL, !!value); udelay(3); } static void set_sda(u8 value) { - gpio_line_set(GPIO_SDA, !!value); + gpio_set_value(GPIO_SDA, !!value); udelay(3); } static void set_str(u8 value) { - gpio_line_set(GPIO_STR, !!value); + gpio_set_value(GPIO_STR, !!value); udelay(3); } @@ -108,8 +109,8 @@ static void output_control(void) { int i; - gpio_line_config(GPIO_SCL, IXP4XX_GPIO_OUT); - gpio_line_config(GPIO_SDA, IXP4XX_GPIO_OUT); + gpio_direction_output(GPIO_SCL, 1); + gpio_direction_output(GPIO_SDA, 1); for (i = 0; i < 8; i++) { set_scl(0); @@ -151,8 +152,8 @@ static int hss_set_clock(int port, unsigned int clock_type) static irqreturn_t hss_dcd_irq(int irq, void *pdev) { - int i, port = (irq == IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N)); - gpio_line_get(port ? GPIO_HSS1_DCD_N : GPIO_HSS0_DCD_N, &i); + int port = (irq == IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N)); + int i = gpio_get_value(port ? GPIO_HSS1_DCD_N : GPIO_HSS0_DCD_N); set_carrier_cb_tab[port](pdev, !i); return IRQ_HANDLED; } @@ -168,7 +169,7 @@ static int hss_open(int port, void *pdev, else irq = IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N); - gpio_line_get(port ? GPIO_HSS1_DCD_N : GPIO_HSS0_DCD_N, &i); + i = gpio_get_value(port ? GPIO_HSS1_DCD_N : GPIO_HSS0_DCD_N); set_carrier_cb(pdev, !i); set_carrier_cb_tab[!!port] = set_carrier_cb; @@ -181,7 +182,7 @@ static int hss_open(int port, void *pdev, set_control(port ? CONTROL_HSS1_DTR_N : CONTROL_HSS0_DTR_N, 0); output_control(); - gpio_line_set(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 0); + gpio_set_value(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 0); return 0; } @@ -193,7 +194,7 @@ static void hss_close(int port, void *pdev) set_control(port ? CONTROL_HSS1_DTR_N : CONTROL_HSS0_DTR_N, 1); output_control(); - gpio_line_set(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 1); + gpio_set_value(port ? GPIO_HSS1_RTS_N : GPIO_HSS0_RTS_N, 1); } @@ -413,13 +414,21 @@ static void __init gmlr_init(void) if (hw_bits & CFG_HW_HAS_EEPROM) device_tab[devices++] = &device_i2c; /* max index 6 */ - gpio_line_config(GPIO_SCL, IXP4XX_GPIO_OUT); - gpio_line_config(GPIO_SDA, IXP4XX_GPIO_OUT); - gpio_line_config(GPIO_STR, IXP4XX_GPIO_OUT); - gpio_line_config(GPIO_HSS0_RTS_N, IXP4XX_GPIO_OUT); - gpio_line_config(GPIO_HSS1_RTS_N, IXP4XX_GPIO_OUT); - gpio_line_config(GPIO_HSS0_DCD_N, IXP4XX_GPIO_IN); - gpio_line_config(GPIO_HSS1_DCD_N, IXP4XX_GPIO_IN); + gpio_request(GPIO_SCL, "SCL/clock"); + gpio_request(GPIO_SDA, "SDA/data"); + gpio_request(GPIO_STR, "strobe"); + gpio_request(GPIO_HSS0_RTS_N, "HSS0 RTS"); + gpio_request(GPIO_HSS1_RTS_N, "HSS1 RTS"); + gpio_request(GPIO_HSS0_DCD_N, "HSS0 DCD"); + gpio_request(GPIO_HSS1_DCD_N, "HSS1 DCD"); + + gpio_direction_output(GPIO_SCL, 1); + gpio_direction_output(GPIO_SDA, 1); + gpio_direction_output(GPIO_STR, 0); + gpio_direction_output(GPIO_HSS0_RTS_N, 1); + gpio_direction_output(GPIO_HSS1_RTS_N, 1); + gpio_direction_input(GPIO_HSS0_DCD_N); + gpio_direction_input(GPIO_HSS1_DCD_N); irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS0_DCD_N), IRQ_TYPE_EDGE_BOTH); irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N), IRQ_TYPE_EDGE_BOTH); -- cgit v1.2.3 From 53ad835ce7050dc3a3b3343fb07636db86783e26 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 26 Mar 2014 23:07:17 +0100 Subject: Revert "ARM: ixp4xx: Make dma_set_coherent_mask common, correct implementation" This reverts commit bfdad565ae0a61ac943974b8ae61ec0ed55ceb04. The patch turned out to be incorrect, and will be replaced with a correct patch. Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/common-pci.c | 9 +++++++++ arch/arm/mach-ixp4xx/common.c | 12 ------------ 2 files changed, 9 insertions(+), 12 deletions(-) (limited to 'arch/arm/mach-ixp4xx') diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 055d81694a17..200970d56f6d 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -481,5 +481,14 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys) return 1; } +int dma_set_coherent_mask(struct device *dev, u64 mask) +{ + if (mask >= SZ_64M - 1) + return 0; + + return -EIO; +} + EXPORT_SYMBOL(ixp4xx_pci_read); EXPORT_SYMBOL(ixp4xx_pci_write); +EXPORT_SYMBOL(dma_set_coherent_mask); diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index df82a2b4a546..6d68aed6548a 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include @@ -579,17 +578,6 @@ void ixp4xx_restart(enum reboot_mode mode, const char *cmd) } } -int dma_set_coherent_mask(struct device *dev, u64 mask) -{ - if (dev_is_pci(dev) && mask >= SZ_64M) - return -EIO; - - dev->coherent_dma_mask = mask; - - return 0; -} -EXPORT_SYMBOL(dma_set_coherent_mask); - #ifdef CONFIG_IXP4XX_INDIRECT_PCI /* * In the case of using indirect PCI, we simply return the actual PCI -- cgit v1.2.3 From 00e1b3a3d196ae876370633b32007bf98584e748 Mon Sep 17 00:00:00 2001 From: Krzysztof Halasa Date: Sun, 23 Mar 2014 01:36:48 +0100 Subject: IXP4xx: Fix DMA masks. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now, devices will have 32-bit default DMA masks (0xFFFFFFFF) as per DMA API. Fixes: $ ifconfig eth0 up net eth0: coherent DMA mask is unset $ ifconfig hdlc0 up net hdlc0: coherent DMA mask is unset Also fixes a cosmetic off-by-one bug which caused DMA transfers ending exactly on the 64 MiB boundary to go through dmabounce unnecessarily. Signed-off-by: Krzysztof Hałasa Tested-by: Simon Kagstrom Signed-off-by: Arnd Bergmann --- arch/arm/mach-ixp4xx/common-pci.c | 39 ------------------------- arch/arm/mach-ixp4xx/common.c | 61 +++++++++++++++++++++++++++++++++++---- 2 files changed, 56 insertions(+), 44 deletions(-) (limited to 'arch/arm/mach-ixp4xx') diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 200970d56f6d..4977296f0c78 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -315,33 +315,6 @@ static int abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *r return 0; } - -static int ixp4xx_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) -{ - return (dma_addr + size) >= SZ_64M; -} - -/* - * Setup DMA mask to 64MB on PCI devices. Ignore all other devices. - */ -static int ixp4xx_pci_platform_notify(struct device *dev) -{ - if (dev_is_pci(dev)) { - *dev->dma_mask = SZ_64M - 1; - dev->coherent_dma_mask = SZ_64M - 1; - dmabounce_register_dev(dev, 2048, 4096, ixp4xx_needs_bounce); - } - return 0; -} - -static int ixp4xx_pci_platform_notify_remove(struct device *dev) -{ - if (dev_is_pci(dev)) - dmabounce_unregister_dev(dev); - - return 0; -} - void __init ixp4xx_pci_preinit(void) { unsigned long cpuid = read_cpuid_id(); @@ -475,20 +448,8 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys) pci_add_resource_offset(&sys->resources, &res[0], sys->io_offset); pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); - platform_notify = ixp4xx_pci_platform_notify; - platform_notify_remove = ixp4xx_pci_platform_notify_remove; - return 1; } -int dma_set_coherent_mask(struct device *dev, u64 mask) -{ - if (mask >= SZ_64M - 1) - return 0; - - return -EIO; -} - EXPORT_SYMBOL(ixp4xx_pci_read); EXPORT_SYMBOL(ixp4xx_pci_write); -EXPORT_SYMBOL(dma_set_coherent_mask); diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 6d68aed6548a..12c71a4a42a0 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -30,8 +30,8 @@ #include #include #include +#include #include - #include #include #include @@ -40,7 +40,6 @@ #include #include #include - #include #include #include @@ -578,6 +577,54 @@ void ixp4xx_restart(enum reboot_mode mode, const char *cmd) } } +#ifdef CONFIG_PCI +static int ixp4xx_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) +{ + return (dma_addr + size) > SZ_64M; +} + +static int ixp4xx_platform_notify_remove(struct device *dev) +{ + if (dev_is_pci(dev)) + dmabounce_unregister_dev(dev); + + return 0; +} +#endif + +/* + * Setup DMA mask to 64MB on PCI devices and 4 GB on all other things. + */ +static int ixp4xx_platform_notify(struct device *dev) +{ + dev->dma_mask = &dev->coherent_dma_mask; + +#ifdef CONFIG_PCI + if (dev_is_pci(dev)) { + dev->coherent_dma_mask = DMA_BIT_MASK(28); /* 64 MB */ + dmabounce_register_dev(dev, 2048, 4096, ixp4xx_needs_bounce); + return 0; + } +#endif + + dev->coherent_dma_mask = DMA_BIT_MASK(32); + return 0; +} + +int dma_set_coherent_mask(struct device *dev, u64 mask) +{ + if (dev_is_pci(dev)) + mask &= DMA_BIT_MASK(28); /* 64 MB */ + + if ((mask & DMA_BIT_MASK(28)) == DMA_BIT_MASK(28)) { + dev->coherent_dma_mask = mask; + return 0; + } + + return -EIO; /* device wanted sub-64MB mask */ +} +EXPORT_SYMBOL(dma_set_coherent_mask); + #ifdef CONFIG_IXP4XX_INDIRECT_PCI /* * In the case of using indirect PCI, we simply return the actual PCI @@ -600,12 +647,16 @@ static void ixp4xx_iounmap(void __iomem *addr) if (!is_pci_memory((__force u32)addr)) __iounmap(addr); } +#endif void __init ixp4xx_init_early(void) { + platform_notify = ixp4xx_platform_notify; +#ifdef CONFIG_PCI + platform_notify_remove = ixp4xx_platform_notify_remove; +#endif +#ifdef CONFIG_IXP4XX_INDIRECT_PCI arch_ioremap_caller = ixp4xx_ioremap_caller; arch_iounmap = ixp4xx_iounmap; -} -#else -void __init ixp4xx_init_early(void) {} #endif +} -- cgit v1.2.3