From 6a697e3d310d79ea0e385975c57084ce22b04b36 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 12 Nov 2010 11:10:55 +0100 Subject: ARM: mx3: dynamically register mxc-mmc devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Compared to the static devices the dynamic have a DMA resource. This should be save as it seems unused in the driver. Signed-off-by: Uwe Kleine-König --- arch/arm/plat-mxc/devices/platform-mxc-mmc.c | 20 +++++++++++++++----- arch/arm/plat-mxc/include/mach/devices-common.h | 1 + arch/arm/plat-mxc/include/mach/mx31.h | 10 ++++++---- 3 files changed, 22 insertions(+), 9 deletions(-) (limited to 'arch/arm/plat-mxc') diff --git a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c index 953319e4d874..90d762f6f93b 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc-mmc.c +++ b/arch/arm/plat-mxc/devices/platform-mxc-mmc.c @@ -9,20 +9,21 @@ #include #include -#define imx_mxc_mmc_data_entry_single(soc, _id, _hwid) \ +#define imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) \ { \ .id = _id, \ .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ .irq = soc ## _INT_SDHC ## _hwid, \ .dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \ } -#define imx_mxc_mmc_data_entry(soc, _id, _hwid) \ - [_id] = imx_mxc_mmc_data_entry_single(soc, _id, _hwid) +#define imx_mxc_mmc_data_entry(soc, _id, _hwid, _size) \ + [_id] = imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) #ifdef CONFIG_SOC_IMX21 const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = { #define imx21_mxc_mmc_data_entry(_id, _hwid) \ - imx_mxc_mmc_data_entry(MX21, _id, _hwid) + imx_mxc_mmc_data_entry(MX21, _id, _hwid, SZ_4K) imx21_mxc_mmc_data_entry(0, 1), imx21_mxc_mmc_data_entry(1, 2), }; @@ -31,12 +32,21 @@ const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = { #ifdef CONFIG_SOC_IMX27 const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = { #define imx27_mxc_mmc_data_entry(_id, _hwid) \ - imx_mxc_mmc_data_entry(MX27, _id, _hwid) + imx_mxc_mmc_data_entry(MX27, _id, _hwid, SZ_4K) imx27_mxc_mmc_data_entry(0, 1), imx27_mxc_mmc_data_entry(1, 2), }; #endif /* ifdef CONFIG_SOC_IMX27 */ +#ifdef CONFIG_SOC_IMX31 +const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = { +#define imx31_mxc_mmc_data_entry(_id, _hwid) \ + imx_mxc_mmc_data_entry(MX31, _id, _hwid, SZ_16K) + imx31_mxc_mmc_data_entry(0, 1), + imx31_mxc_mmc_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX31 */ + struct platform_device *__init imx_add_mxc_mmc( const struct imx_mxc_mmc_data *data, const struct imxmmc_platform_data *pdata) diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 95331aeb854e..5a62dc479192 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -202,6 +202,7 @@ struct platform_device *__init imx_add_mxc_ehci( struct imx_mxc_mmc_data { int id; resource_size_t iobase; + resource_size_t iosize; resource_size_t irq; resource_size_t dmareq; }; diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index 6d4b98f48f4b..d024c9c5dd3f 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h @@ -41,8 +41,8 @@ #define MX31_SPBA0_BASE_ADDR 0x50000000 #define MX31_SPBA0_SIZE SZ_1M -#define MX31_MMC_SDHC1_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x04000) -#define MX31_MMC_SDHC2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x08000) +#define MX31_SDHC1_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x04000) +#define MX31_SDHC2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x08000) #define MX31_UART3_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x0c000) #define MX31_CSPI2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x10000) #define MX31_SSI2_BASE_ADDR (MX31_SPBA0_BASE_ADDR + 0x14000) @@ -134,8 +134,8 @@ static inline void mx31_setup_weimcs(size_t cs, #define MX31_INT_MPEG4_ENCODER 5 #define MX31_INT_RTIC 6 #define MX31_INT_FIRI 7 -#define MX31_INT_MMC_SDHC2 8 -#define MX31_INT_MMC_SDHC1 9 +#define MX31_INT_SDHC2 8 +#define MX31_INT_SDHC1 9 #define MX31_INT_I2C1 10 #define MX31_INT_SSI2 11 #define MX31_INT_SSI1 12 @@ -188,6 +188,8 @@ static inline void mx31_setup_weimcs(size_t cs, #define MX31_INT_EXT_WDOG 62 #define MX31_INT_EXT_TV 63 +#define MX31_DMA_REQ_SDHC1 20 +#define MX31_DMA_REQ_SDHC2 21 #define MX31_DMA_REQ_SSI2_RX1 22 #define MX31_DMA_REQ_SSI2_TX1 23 #define MX31_DMA_REQ_SSI2_RX0 24 -- cgit v1.2.3