From 3eaf2abd11aa7f3b2fb04d60c64b2c756fe030eb Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Mon, 9 Oct 2023 22:27:26 +0300 Subject: arm64: dts: rockchip: Add sfc node to rk3588s Add SFC (SPI Flash) to RK3588S SOC. Reviewed-by: Dhruva Gole Signed-off-by: Muhammed Efe Cetin Link: https://lore.kernel.org/r/d36a64edfaede92ce2e158b0d9dc4f5998e019e3.1696878787.git.efectn@6tel.net Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm64/boot/dts/rockchip') diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 5544f66c6ff4..1a820a5a51eb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1424,6 +1424,17 @@ }; }; + sfc: spi@fe2b0000 { + compatible = "rockchip,sfc"; + reg = <0x0 0xfe2b0000 0x0 0x4000>; + interrupts = ; + clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; + clock-names = "clk_sfc", "hclk_sfc"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + sdmmc: mmc@fe2c0000 { compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xfe2c0000 0x0 0x4000>; -- cgit v1.2.3