From a9bb5a4bf9f84256499c802fd397d56d55227e4f Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 13 Jan 2012 22:56:32 +0000 Subject: PCMCIA: pxa: convert PXA socket drivers to use new irq/gpio management Convert all the PXA platform socket drivers to use the new irq/gpio management provided by soc_common. This relieves these drivers from having to do anything with these GPIOs other than provide the numbers to soc_common. Acked-by: Dominik Brodowski Signed-off-by: Russell King --- arch/arm/mach-pxa/include/mach/balloon3.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h index f02fa1e6ba86..954641e6c8b1 100644 --- a/arch/arm/mach-pxa/include/mach/balloon3.h +++ b/arch/arm/mach-pxa/include/mach/balloon3.h @@ -174,7 +174,6 @@ enum balloon3_features { #define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ) #define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ) -#define BALLOON3_S0_CD_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_S0_CD) #define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) -- cgit v1.2.3 From 03e0092c85e34b6f84bb3b852579b78a17496be2 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 13 Jan 2012 23:02:15 +0000 Subject: PCMCIA: sa11x0: assabet: convert to use new irq/gpio management Convert Assabet socket driver to use the new irq/gpio management. This is slightly more involved because we have to touch the private platform header file to modify the GPIO bitmasks to be GPIO numbers. Acked-by: Dominik Brodowski Signed-off-by: Russell King --- arch/arm/mach-sa1100/include/mach/assabet.h | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-sa1100/include/mach/assabet.h b/arch/arm/mach-sa1100/include/mach/assabet.h index 28c2cf50c259..307391488c22 100644 --- a/arch/arm/mach-sa1100/include/mach/assabet.h +++ b/arch/arm/mach-sa1100/include/mach/assabet.h @@ -85,21 +85,18 @@ extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set); #define ASSABET_BSR_RAD_RI (1 << 31) -/* GPIOs for which the generic definition doesn't say much */ +/* GPIOs (bitmasks) for which the generic definition doesn't say much */ #define ASSABET_GPIO_RADIO_IRQ GPIO_GPIO (14) /* Radio interrupt request */ #define ASSABET_GPIO_PS_MODE_SYNC GPIO_GPIO (16) /* Power supply mode/sync */ #define ASSABET_GPIO_STEREO_64FS_CLK GPIO_GPIO (19) /* SSP UDA1341 clock input */ -#define ASSABET_GPIO_CF_IRQ GPIO_GPIO (21) /* CF IRQ */ -#define ASSABET_GPIO_CF_CD GPIO_GPIO (22) /* CF CD */ -#define ASSABET_GPIO_CF_BVD2 GPIO_GPIO (24) /* CF BVD */ #define ASSABET_GPIO_GFX_IRQ GPIO_GPIO (24) /* Graphics IRQ */ -#define ASSABET_GPIO_CF_BVD1 GPIO_GPIO (25) /* CF BVD */ #define ASSABET_GPIO_BATT_LOW GPIO_GPIO (26) /* Low battery */ #define ASSABET_GPIO_RCLK GPIO_GPIO (26) /* CCLK/2 */ -#define ASSABET_IRQ_GPIO_CF_IRQ IRQ_GPIO21 -#define ASSABET_IRQ_GPIO_CF_CD IRQ_GPIO22 -#define ASSABET_IRQ_GPIO_CF_BVD2 IRQ_GPIO24 -#define ASSABET_IRQ_GPIO_CF_BVD1 IRQ_GPIO25 +/* These are gpiolib GPIO numbers, not bitmasks */ +#define ASSABET_GPIO_CF_IRQ 21 /* CF IRQ */ +#define ASSABET_GPIO_CF_CD 22 /* CF CD */ +#define ASSABET_GPIO_CF_BVD2 24 /* CF BVD / IOSPKR */ +#define ASSABET_GPIO_CF_BVD1 25 /* CF BVD / IOSTSCHG */ #endif -- cgit v1.2.3 From f793e3ab9f4cfbdba6269c8a6c522c5d665289b1 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 13 Jan 2012 23:03:57 +0000 Subject: PCMCIA: sa11x0: cerf: convert to use new irq/gpio management Convert Cerf socket driver to use the new irq/gpio management. This is slightly more involved because we have to touch the private platform header file to modify the GPIO bitmasks to be GPIO numbers. Acked-by: Dominik Brodowski Signed-off-by: Russell King --- arch/arm/mach-sa1100/include/mach/cerf.h | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-sa1100/include/mach/cerf.h b/arch/arm/mach-sa1100/include/mach/cerf.h index c3ac3d0f9465..0e49545a3723 100644 --- a/arch/arm/mach-sa1100/include/mach/cerf.h +++ b/arch/arm/mach-sa1100/include/mach/cerf.h @@ -14,15 +14,10 @@ #define CERF_ETH_IO 0xf0000000 #define CERF_ETH_IRQ IRQ_GPIO26 -#define CERF_GPIO_CF_BVD2 GPIO_GPIO (19) -#define CERF_GPIO_CF_BVD1 GPIO_GPIO (20) +#define CERF_GPIO_CF_BVD2 19 +#define CERF_GPIO_CF_BVD1 20 #define CERF_GPIO_CF_RESET GPIO_GPIO (21) -#define CERF_GPIO_CF_IRQ GPIO_GPIO (22) -#define CERF_GPIO_CF_CD GPIO_GPIO (23) - -#define CERF_IRQ_GPIO_CF_BVD2 IRQ_GPIO19 -#define CERF_IRQ_GPIO_CF_BVD1 IRQ_GPIO20 -#define CERF_IRQ_GPIO_CF_IRQ IRQ_GPIO22 -#define CERF_IRQ_GPIO_CF_CD IRQ_GPIO23 +#define CERF_GPIO_CF_IRQ 22 +#define CERF_GPIO_CF_CD 23 #endif // _INCLUDE_CERF_H_ -- cgit v1.2.3 From bbb58a1210c6fdc68b09f7b9e12096c2a1886aa1 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 18 Jan 2012 12:32:37 +0000 Subject: PCMCIA: sa11x0: cerf: convert reset handling to use GPIO subsystem Rather than accessing GPSR and GPCR directly, use the GPIO subsystem instead. Acked-by: Dominik Brodowski Signed-off-by: Russell King --- arch/arm/mach-sa1100/include/mach/cerf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-sa1100/include/mach/cerf.h b/arch/arm/mach-sa1100/include/mach/cerf.h index 0e49545a3723..88fd9c006ce0 100644 --- a/arch/arm/mach-sa1100/include/mach/cerf.h +++ b/arch/arm/mach-sa1100/include/mach/cerf.h @@ -16,7 +16,7 @@ #define CERF_GPIO_CF_BVD2 19 #define CERF_GPIO_CF_BVD1 20 -#define CERF_GPIO_CF_RESET GPIO_GPIO (21) +#define CERF_GPIO_CF_RESET 21 #define CERF_GPIO_CF_IRQ 22 #define CERF_GPIO_CF_CD 23 -- cgit v1.2.3 From 7cf779cb8ddeef797a3a265889c7f088d42a12f7 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 13 Jan 2012 23:05:12 +0000 Subject: PCMCIA: sa11x0: nanoengine: convert to use new irq/gpio management Convert Nanoengine socket driver to use the new irq/gpio management. This is slightly more involved because we have to touch the private platform header file to modify the GPIO bitmasks to be GPIO numbers. Acked-by: Dominik Brodowski Signed-off-by: Russell King --- arch/arm/mach-sa1100/include/mach/nanoengine.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-sa1100/include/mach/nanoengine.h b/arch/arm/mach-sa1100/include/mach/nanoengine.h index 14f8382d0665..ad24c6c37402 100644 --- a/arch/arm/mach-sa1100/include/mach/nanoengine.h +++ b/arch/arm/mach-sa1100/include/mach/nanoengine.h @@ -16,10 +16,10 @@ #include -#define GPIO_PC_READY0 GPIO_GPIO(11) /* ready for socket 0 (active high)*/ -#define GPIO_PC_READY1 GPIO_GPIO(12) /* ready for socket 1 (active high) */ -#define GPIO_PC_CD0 GPIO_GPIO(13) /* detect for socket 0 (active low) */ -#define GPIO_PC_CD1 GPIO_GPIO(14) /* detect for socket 1 (active low) */ +#define GPIO_PC_READY0 11 /* ready for socket 0 (active high)*/ +#define GPIO_PC_READY1 12 /* ready for socket 1 (active high) */ +#define GPIO_PC_CD0 13 /* detect for socket 0 (active low) */ +#define GPIO_PC_CD1 14 /* detect for socket 1 (active low) */ #define GPIO_PC_RESET0 GPIO_GPIO(15) /* reset socket 0 */ #define GPIO_PC_RESET1 GPIO_GPIO(16) /* reset socket 1 */ -- cgit v1.2.3 From 76346a4eabf85a44dc425c0197ba46a8884e6090 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 18 Jan 2012 12:37:20 +0000 Subject: PCMCIA: sa11x0: nanoengine: convert reset handling to use GPIO subsystem Rather than accessing GPSR and GPCR directly, use the GPIO subsystem instead. Acked-by: Dominik Brodowski Signed-off-by: Russell King --- arch/arm/mach-sa1100/include/mach/nanoengine.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-sa1100/include/mach/nanoengine.h b/arch/arm/mach-sa1100/include/mach/nanoengine.h index ad24c6c37402..5ebd469a31f2 100644 --- a/arch/arm/mach-sa1100/include/mach/nanoengine.h +++ b/arch/arm/mach-sa1100/include/mach/nanoengine.h @@ -20,8 +20,8 @@ #define GPIO_PC_READY1 12 /* ready for socket 1 (active high) */ #define GPIO_PC_CD0 13 /* detect for socket 0 (active low) */ #define GPIO_PC_CD1 14 /* detect for socket 1 (active low) */ -#define GPIO_PC_RESET0 GPIO_GPIO(15) /* reset socket 0 */ -#define GPIO_PC_RESET1 GPIO_GPIO(16) /* reset socket 1 */ +#define GPIO_PC_RESET0 15 /* reset socket 0 */ +#define GPIO_PC_RESET1 16 /* reset socket 1 */ #define NANOENGINE_IRQ_GPIO_PCI IRQ_GPIO0 #define NANOENGINE_IRQ_GPIO_PC_READY0 IRQ_GPIO11 -- cgit v1.2.3 From 3b61436a792517848ee386bd2ccf4fc3a75f1a0f Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 13 Jan 2012 23:06:09 +0000 Subject: PCMCIA: sa11x0: shannon: convert to use new irq/gpio management Convert Shannon socket driver to use the new irq/gpio management. This is slightly more involved because we have to touch the private platform header file to modify the GPIO bitmasks to be GPIO numbers. Acked-by: Dominik Brodowski Signed-off-by: Russell King --- arch/arm/mach-sa1100/include/mach/shannon.h | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-sa1100/include/mach/shannon.h b/arch/arm/mach-sa1100/include/mach/shannon.h index ec27d6e12140..019f857a7938 100644 --- a/arch/arm/mach-sa1100/include/mach/shannon.h +++ b/arch/arm/mach-sa1100/include/mach/shannon.h @@ -23,14 +23,10 @@ #define SHANNON_GPIO_SENSE_12V GPIO_GPIO (21) /* Input, 12v flash unprotect detected */ #define SHANNON_GPIO_DISP_EN GPIO_GPIO (22) /* out */ /* XXX GPIO 23 unaccounted for */ -#define SHANNON_GPIO_EJECT_0 GPIO_GPIO (24) /* in */ -#define SHANNON_IRQ_GPIO_EJECT_0 IRQ_GPIO24 -#define SHANNON_GPIO_EJECT_1 GPIO_GPIO (25) /* in */ -#define SHANNON_IRQ_GPIO_EJECT_1 IRQ_GPIO25 -#define SHANNON_GPIO_RDY_0 GPIO_GPIO (26) /* in */ -#define SHANNON_IRQ_GPIO_RDY_0 IRQ_GPIO26 -#define SHANNON_GPIO_RDY_1 GPIO_GPIO (27) /* in */ -#define SHANNON_IRQ_GPIO_RDY_1 IRQ_GPIO27 +#define SHANNON_GPIO_EJECT_0 24 /* in */ +#define SHANNON_GPIO_EJECT_1 25 /* in */ +#define SHANNON_GPIO_RDY_0 26 /* in */ +#define SHANNON_GPIO_RDY_1 27 /* in */ /* MCP UCB codec GPIO pins... */ -- cgit v1.2.3 From b1d8a5f91796179f33de9cd7fb26052fcc47b4fa Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 13 Jan 2012 23:06:48 +0000 Subject: PCMCIA: sa11x0: simpad: convert to use new irq/gpio management Convert Simpad socket driver to use the new irq/gpio management. This is slightly more involved because we have to touch the private platform header file to modify the GPIO bitmasks to be GPIO numbers. Acked-by: Dominik Brodowski Signed-off-by: Russell King --- arch/arm/mach-sa1100/include/mach/simpad.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-sa1100/include/mach/simpad.h b/arch/arm/mach-sa1100/include/mach/simpad.h index db28118103eb..cdea671e8931 100644 --- a/arch/arm/mach-sa1100/include/mach/simpad.h +++ b/arch/arm/mach-sa1100/include/mach/simpad.h @@ -39,10 +39,8 @@ /*--- PCMCIA ---*/ -#define GPIO_CF_CD GPIO_GPIO24 -#define GPIO_CF_IRQ GPIO_GPIO1 -#define IRQ_GPIO_CF_IRQ IRQ_GPIO1 -#define IRQ_GPIO_CF_CD IRQ_GPIO24 +#define GPIO_CF_CD 24 +#define GPIO_CF_IRQ 1 /*--- SmartCard ---*/ #define GPIO_SMART_CARD GPIO_GPIO10 -- cgit v1.2.3