From b332fec0489295ee7a0aab4a89bd7257cd126f7f Mon Sep 17 00:00:00 2001 From: Matt Redfearn Date: Tue, 8 Aug 2017 13:22:31 +0100 Subject: MIPS: microMIPS: Fix detection of addiusp instruction The addiusp instruction uses the pool16d opcode, with bit 0 of the immediate set. The test for the addiusp opcode erroneously did a logical and of the immediate with mm_addiusp_func, which has value 1, so this test always passes when the immediate is non-zero. Fix the test by replacing the logical and with a bitwise and. Fixes: 34c2f668d0f6 ("MIPS: microMIPS: Add unaligned access support.") Signed-off-by: Matt Redfearn Cc: Marcin Nowakowski Cc: Ingo Molnar Cc: Paul Burton Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16954/ Signed-off-by: Ralf Baechle --- arch/mips/kernel/process.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips/kernel/process.c') diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index 8374bf40ac77..40200545a3d9 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -326,7 +326,7 @@ static inline int is_sp_move_ins(union mips_instruction *ip) */ if (mm_insn_16bit(ip->halfword[1])) { return (ip->mm16_r3_format.opcode == mm_pool16d_op && - ip->mm16_r3_format.simmediate && mm_addiusp_func) || + ip->mm16_r3_format.simmediate & mm_addiusp_func) || (ip->mm16_r5_format.opcode == mm_pool16d_op && ip->mm16_r5_format.rt == 29); } -- cgit v1.2.3