From 97b921087fa76b1b0b2a20ae70d0e8b6d394c4ea Mon Sep 17 00:00:00 2001 From: John Crispin Date: Thu, 5 May 2016 09:57:56 +0200 Subject: MIPS: Change my email address The old address is no longer valid. Use the my new one instead. Signed-off-by: John Crispin Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13201/ Signed-off-by: Ralf Baechle --- arch/mips/ralink/mt7620.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips/ralink/mt7620.c') diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c index 0d3d1a97895f..2c623f6bca08 100644 --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c @@ -7,7 +7,7 @@ * * Copyright (C) 2008-2011 Gabor Juhos * Copyright (C) 2008 Imre Kaloz - * Copyright (C) 2013 John Crispin + * Copyright (C) 2013 John Crispin */ #include -- cgit v1.2.3 From 86ce9a340e38bcba664fb11c7ab9ba03fcf5e55e Mon Sep 17 00:00:00 2001 From: Sashka Nochkin Date: Tue, 19 Apr 2016 23:44:45 -0400 Subject: mips: mt7620: fallback to SDRAM when syscfg0 does not have a valid value for the memory type Mediatek MT7620 SoC has syscfg0 bits where it sets the type of memory being used. However, sometimes those bits are not set properly (reading "11"). In this case, the SoC assumes SDRAM. The patch below reflects that. Signed-off-by: Sashka Nochkin Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13135/ Signed-off-by: Ralf Baechle --- arch/mips/ralink/mt7620.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/mips/ralink/mt7620.c') diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c index 2c623f6bca08..88b82fe21ae6 100644 --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c @@ -581,11 +581,14 @@ void prom_soc_init(struct ralink_soc_info *soc_info) (rev & CHIP_REV_ECO_MASK)); cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0); - if (is_mt76x8()) + if (is_mt76x8()) { dram_type = cfg0 & DRAM_TYPE_MT7628_MASK; - else + } else { dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK; + if (dram_type == SYSCFG0_DRAM_TYPE_UNKNOWN) + dram_type = SYSCFG0_DRAM_TYPE_SDRAM; + } soc_info->mem_base = MT7620_DRAM_BASE; if (is_mt76x8()) -- cgit v1.2.3