From fba43665360d361d338efd120a34ad615ca960d8 Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Thu, 21 Sep 2006 17:26:34 +0400 Subject: POWERPC: Add cpm2 stuff support to the fsl_soc.c This patch contains necessary modifications to support the CPM2 SoC peripherals. For the time being, those are fs_enet Ethernet driver and cpm_uart serial. Written initially to support mpc8560, it also suites to the part of the large PQ2 (more specifically, mpc8260) family. Signed-off-by: Vitaly Bordug --- arch/powerpc/sysdev/fsl_soc.c | 268 +++++++++++++++++++++++++++++++++++++++++- arch/powerpc/sysdev/fsl_soc.h | 2 + 2 files changed, 265 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 92ba378b7990..0ed2aaee105c 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c @@ -3,6 +3,9 @@ * * Maintained by Kumar Gala (see MAINTAINERS for contact information) * + * 2006 (c) MontaVista Software, Inc. + * Vitaly Bordug + * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your @@ -20,14 +23,18 @@ #include #include #include +#include +#include #include #include #include #include +#include #include #include #include +#include static phys_addr_t immrbase = -1; @@ -42,7 +49,9 @@ phys_addr_t get_immrbase(void) if (soc) { unsigned int size; const void *prop = get_property(soc, "reg", &size); - immrbase = of_translate_address(soc, prop); + + if (prop) + immrbase = of_translate_address(soc, prop); of_node_put(soc); }; @@ -51,6 +60,59 @@ phys_addr_t get_immrbase(void) EXPORT_SYMBOL(get_immrbase); +#ifdef CONFIG_CPM2 + +static u32 brgfreq = -1; + +u32 get_brgfreq(void) +{ + struct device_node *node; + + if (brgfreq != -1) + return brgfreq; + + node = of_find_node_by_type(NULL, "cpm"); + if (node) { + unsigned int size; + const unsigned int *prop = get_property(node, "brg-frequency", + &size); + + if (prop) + brgfreq = *prop; + of_node_put(node); + }; + + return brgfreq; +} + +EXPORT_SYMBOL(get_brgfreq); + +static u32 fs_baudrate = -1; + +u32 get_baudrate(void) +{ + struct device_node *node; + + if (fs_baudrate != -1) + return fs_baudrate; + + node = of_find_node_by_type(NULL, "serial"); + if (node) { + unsigned int size; + const unsigned int *prop = get_property(node, "current-speed", + &size); + + if (prop) + fs_baudrate = *prop; + of_node_put(node); + }; + + return fs_baudrate; +} + +EXPORT_SYMBOL(get_baudrate); +#endif /* CONFIG_CPM2 */ + static int __init gfar_mdio_of_init(void) { struct device_node *np; @@ -85,8 +147,11 @@ static int __init gfar_mdio_of_init(void) mdio_data.irq[k] = -1; while ((child = of_get_next_child(np, child)) != NULL) { - const u32 *id = get_property(child, "reg", NULL); - mdio_data.irq[*id] = irq_of_parse_and_map(child, 0); + int irq = irq_of_parse_and_map(child, 0); + if (irq != NO_IRQ) { + const u32 *id = get_property(child, "reg", NULL); + mdio_data.irq[*id] = irq; + } } ret = @@ -128,7 +193,7 @@ static int __init gfar_of_init(void) const char *model; const void *mac_addr; const phandle *ph; - int n_res = 1; + int n_res = 2; memset(r, 0, sizeof(r)); memset(&gfar_data, 0, sizeof(gfar_data)); @@ -159,7 +224,7 @@ static int __init gfar_of_init(void) gfar_dev = platform_device_register_simple("fsl-gianfar", i, &r[0], - n_res + 1); + n_res); if (IS_ERR(gfar_dev)) { ret = PTR_ERR(gfar_dev); @@ -478,3 +543,196 @@ err: } arch_initcall(fsl_usb_of_init); + +#ifdef CONFIG_CPM2 + +static const char fcc_regs[] = "fcc_regs"; +static const char fcc_regs_c[] = "fcc_regs_c"; +static const char fcc_pram[] = "fcc_pram"; +static char bus_id[9][BUS_ID_SIZE]; + +static int __init fs_enet_of_init(void) +{ + struct device_node *np; + unsigned int i; + struct platform_device *fs_enet_dev; + struct resource res; + int ret; + + for (np = NULL, i = 0; + (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL; + i++) { + struct resource r[4]; + struct device_node *phy, *mdio; + struct fs_platform_info fs_enet_data; + const unsigned int *id, *phy_addr; + const void *mac_addr; + const phandle *ph; + const char *model; + + memset(r, 0, sizeof(r)); + memset(&fs_enet_data, 0, sizeof(fs_enet_data)); + + ret = of_address_to_resource(np, 0, &r[0]); + if (ret) + goto err; + r[0].name = fcc_regs; + + ret = of_address_to_resource(np, 1, &r[1]); + if (ret) + goto err; + r[1].name = fcc_pram; + + ret = of_address_to_resource(np, 2, &r[2]); + if (ret) + goto err; + r[2].name = fcc_regs_c; + + r[3].start = r[3].end = irq_of_parse_and_map(np, 0); + r[3].flags = IORESOURCE_IRQ; + + fs_enet_dev = + platform_device_register_simple("fsl-cpm-fcc", i, &r[0], 4); + + if (IS_ERR(fs_enet_dev)) { + ret = PTR_ERR(fs_enet_dev); + goto err; + } + + model = get_property(np, "model", NULL); + if (model == NULL) { + ret = -ENODEV; + goto unreg; + } + + mac_addr = get_property(np, "mac-address", NULL); + memcpy(fs_enet_data.macaddr, mac_addr, 6); + + ph = get_property(np, "phy-handle", NULL); + phy = of_find_node_by_phandle(*ph); + + if (phy == NULL) { + ret = -ENODEV; + goto unreg; + } + + phy_addr = get_property(phy, "reg", NULL); + fs_enet_data.phy_addr = *phy_addr; + + id = get_property(np, "device-id", NULL); + fs_enet_data.fs_no = *id; + + mdio = of_get_parent(phy); + ret = of_address_to_resource(mdio, 0, &res); + if (ret) { + of_node_put(phy); + of_node_put(mdio); + goto unreg; + } + + if (strstr(model, "FCC")) { + int fcc_index = fs_get_fcc_index(*id); + + fs_enet_data.dpram_offset = (u32)cpm2_immr->im_dprambase; + fs_enet_data.rx_ring = 32; + fs_enet_data.tx_ring = 32; + fs_enet_data.rx_copybreak = 240; + fs_enet_data.use_napi = 0; + fs_enet_data.napi_weight = 17; + fs_enet_data.mem_offset = FCC_MEM_OFFSET(fcc_index); + fs_enet_data.cp_page = CPM_CR_FCC_PAGE(fcc_index); + fs_enet_data.cp_block = CPM_CR_FCC_SBLOCK(fcc_index); + + snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x", + (u32)res.start, fs_enet_data.phy_addr); + fs_enet_data.bus_id = (char*)&bus_id[(*id)]; + } + + of_node_put(phy); + of_node_put(mdio); + + ret = platform_device_add_data(fs_enet_dev, &fs_enet_data, + sizeof(struct + fs_platform_info)); + if (ret) + goto unreg; + } + return 0; + +unreg: + platform_device_unregister(fs_enet_dev); +err: + return ret; +} + +arch_initcall(fs_enet_of_init); + +static const char scc_regs[] = "regs"; +static const char scc_pram[] = "pram"; + +static int __init cpm_uart_of_init(void) +{ + struct device_node *np; + unsigned int i; + struct platform_device *cpm_uart_dev; + int ret; + + for (np = NULL, i = 0; + (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL; + i++) { + struct resource r[3]; + struct fs_uart_platform_info cpm_uart_data; + const int *id; + + memset(r, 0, sizeof(r)); + memset(&cpm_uart_data, 0, sizeof(cpm_uart_data)); + + ret = of_address_to_resource(np, 0, &r[0]); + if (ret) + goto err; + + r[0].name = scc_regs; + + ret = of_address_to_resource(np, 1, &r[1]); + if (ret) + goto err; + r[1].name = scc_pram; + + r[2].start = r[2].end = irq_of_parse_and_map(np, 0); + r[2].flags = IORESOURCE_IRQ; + + cpm_uart_dev = + platform_device_register_simple("fsl-cpm-scc:uart", i, &r[0], 3); + + if (IS_ERR(cpm_uart_dev)) { + ret = PTR_ERR(cpm_uart_dev); + goto err; + } + + id = get_property(np, "device-id", NULL); + cpm_uart_data.fs_no = *id; + cpm_uart_data.uart_clk = ppc_proc_freq; + + cpm_uart_data.tx_num_fifo = 4; + cpm_uart_data.tx_buf_size = 32; + cpm_uart_data.rx_num_fifo = 4; + cpm_uart_data.rx_buf_size = 32; + + ret = + platform_device_add_data(cpm_uart_dev, &cpm_uart_data, + sizeof(struct + fs_uart_platform_info)); + if (ret) + goto unreg; + } + + return 0; + +unreg: + platform_device_unregister(cpm_uart_dev); +err: + return ret; +} + +arch_initcall(cpm_uart_of_init); +#endif /* CONFIG_CPM2 */ diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h index c433d3f39edd..25230ceffbcf 100644 --- a/arch/powerpc/sysdev/fsl_soc.h +++ b/arch/powerpc/sysdev/fsl_soc.h @@ -3,6 +3,8 @@ #ifdef __KERNEL__ extern phys_addr_t get_immrbase(void); +extern u32 get_brgfreq(void); +extern u32 get_baudrate(void); #endif #endif -- cgit v1.2.3 From b0c110b4f19b226dcc9f7805759bf17f8ef4dca4 Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Thu, 21 Sep 2006 22:18:53 +0400 Subject: POWERPC: Move generic cpm2 stuff to powerpc This moves the cpm2 common code and PIC stuff to the powerpc. Most of the files were just copied from ppc/, with minor tuning to make it compile, and, subsequently, work. Signed-off-by: Vitaly Bordug --- arch/powerpc/lib/Makefile | 5 + arch/powerpc/sysdev/Makefile | 5 + arch/powerpc/sysdev/cpm2_common.c | 210 +++++++++++++++++++++++++++++++ arch/powerpc/sysdev/cpm2_pic.c | 256 ++++++++++++++++++++++++++++++++++++++ arch/powerpc/sysdev/cpm2_pic.h | 8 ++ 5 files changed, 484 insertions(+) create mode 100644 arch/powerpc/sysdev/cpm2_common.c create mode 100644 arch/powerpc/sysdev/cpm2_pic.c create mode 100644 arch/powerpc/sysdev/cpm2_pic.h (limited to 'arch') diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 336dd191f768..8030f6245d82 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -20,3 +20,8 @@ ifeq ($(CONFIG_PPC64),y) obj-$(CONFIG_SMP) += locks.o obj-$(CONFIG_DEBUG_KERNEL) += sstep.o endif + +# Temporary hack until we have migrated to asm-powerpc +ifeq ($(CONFIG_PPC_MERGE),y) +obj-$(CONFIG_CPM2) += rheap.o +endif diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index e5e999ea891a..f15f4d78aee9 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -17,3 +17,8 @@ ifeq ($(CONFIG_PPC_MERGE),y) obj-$(CONFIG_PPC_I8259) += i8259.o obj-$(CONFIG_PPC_83xx) += ipic.o endif + +# Temporary hack until we have migrated to asm-powerpc +ifeq ($(ARCH),powerpc) +obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o +endif diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c new file mode 100644 index 000000000000..f7a04892400b --- /dev/null +++ b/arch/powerpc/sysdev/cpm2_common.c @@ -0,0 +1,210 @@ +/* + * General Purpose functions for the global management of the + * 8260 Communication Processor Module. + * Copyright (c) 1999-2001 Dan Malek + * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com) + * 2.3.99 Updates + * + * 2006 (c) MontaVista Software, Inc. + * Vitaly Bordug + * Merged to arch/powerpc from arch/ppc/syslib/cpm2_common.c + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/* + * + * In addition to the individual control of the communication + * channels, there are a few functions that globally affect the + * communication processor. + * + * Buffer descriptors must be allocated from the dual ported memory + * space. The allocator for that is here. When the communication + * process is reset, we reclaim the memory available. There is + * currently no deallocator for this memory. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +static void cpm2_dpinit(void); +cpm_cpm2_t *cpmp; /* Pointer to comm processor space */ + +/* We allocate this here because it is used almost exclusively for + * the communication processor devices. + */ +cpm2_map_t *cpm2_immr; + +#define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount + of space for CPM as it is larger + than on PQ2 */ + +void +cpm2_reset(void) +{ + cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); + + /* Reclaim the DP memory for our use. + */ + cpm2_dpinit(); + + /* Tell everyone where the comm processor resides. + */ + cpmp = &cpm2_immr->im_cpm; +} + +/* Set a baud rate generator. This needs lots of work. There are + * eight BRGs, which can be connected to the CPM channels or output + * as clocks. The BRGs are in two different block of internal + * memory mapped space. + * The baud rate clock is the system clock divided by something. + * It was set up long ago during the initial boot phase and is + * is given to us. + * Baud rate clocks are zero-based in the driver code (as that maps + * to port numbers). Documentation uses 1-based numbering. + */ +#define BRG_INT_CLK (get_brgfreq()) +#define BRG_UART_CLK (BRG_INT_CLK/16) + +/* This function is used by UARTS, or anything else that uses a 16x + * oversampled clock. + */ +void +cpm_setbrg(uint brg, uint rate) +{ + volatile uint *bp; + + /* This is good enough to get SMCs running..... + */ + if (brg < 4) { + bp = (uint *)&cpm2_immr->im_brgc1; + } else { + bp = (uint *)&cpm2_immr->im_brgc5; + brg -= 4; + } + bp += brg; + *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN; +} + +/* This function is used to set high speed synchronous baud rate + * clocks. + */ +void +cpm2_fastbrg(uint brg, uint rate, int div16) +{ + volatile uint *bp; + + if (brg < 4) { + bp = (uint *)&cpm2_immr->im_brgc1; + } + else { + bp = (uint *)&cpm2_immr->im_brgc5; + brg -= 4; + } + bp += brg; + *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN; + if (div16) + *bp |= CPM_BRG_DIV16; +} + +/* + * dpalloc / dpfree bits. + */ +static spinlock_t cpm_dpmem_lock; +/* 16 blocks should be enough to satisfy all requests + * until the memory subsystem goes up... */ +static rh_block_t cpm_boot_dpmem_rh_block[16]; +static rh_info_t cpm_dpmem_info; + +static void cpm2_dpinit(void) +{ + spin_lock_init(&cpm_dpmem_lock); + + /* initialize the info header */ + rh_init(&cpm_dpmem_info, 1, + sizeof(cpm_boot_dpmem_rh_block) / + sizeof(cpm_boot_dpmem_rh_block[0]), + cpm_boot_dpmem_rh_block); + + /* Attach the usable dpmem area */ + /* XXX: This is actually crap. CPM_DATAONLY_BASE and + * CPM_DATAONLY_SIZE is only a subset of the available dpram. It + * varies with the processor and the microcode patches activated. + * But the following should be at least safe. + */ + rh_attach_region(&cpm_dpmem_info, (void *)CPM_DATAONLY_BASE, + CPM_DATAONLY_SIZE); +} + +/* This function returns an index into the DPRAM area. + */ +uint cpm_dpalloc(uint size, uint align) +{ + void *start; + unsigned long flags; + + spin_lock_irqsave(&cpm_dpmem_lock, flags); + cpm_dpmem_info.alignment = align; + start = rh_alloc(&cpm_dpmem_info, size, "commproc"); + spin_unlock_irqrestore(&cpm_dpmem_lock, flags); + + return (uint)start; +} +EXPORT_SYMBOL(cpm_dpalloc); + +int cpm_dpfree(uint offset) +{ + int ret; + unsigned long flags; + + spin_lock_irqsave(&cpm_dpmem_lock, flags); + ret = rh_free(&cpm_dpmem_info, (void *)offset); + spin_unlock_irqrestore(&cpm_dpmem_lock, flags); + + return ret; +} +EXPORT_SYMBOL(cpm_dpfree); + +/* not sure if this is ever needed */ +uint cpm_dpalloc_fixed(uint offset, uint size, uint align) +{ + void *start; + unsigned long flags; + + spin_lock_irqsave(&cpm_dpmem_lock, flags); + cpm_dpmem_info.alignment = align; + start = rh_alloc_fixed(&cpm_dpmem_info, (void *)offset, size, "commproc"); + spin_unlock_irqrestore(&cpm_dpmem_lock, flags); + + return (uint)start; +} +EXPORT_SYMBOL(cpm_dpalloc_fixed); + +void cpm_dpdump(void) +{ + rh_dump(&cpm_dpmem_info); +} +EXPORT_SYMBOL(cpm_dpdump); + +void *cpm_dpram_addr(uint offset) +{ + return (void *)&cpm2_immr->im_dprambase[offset]; +} +EXPORT_SYMBOL(cpm_dpram_addr); diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c new file mode 100644 index 000000000000..c804475c07d3 --- /dev/null +++ b/arch/powerpc/sysdev/cpm2_pic.c @@ -0,0 +1,256 @@ +/* + * Platform information definitions. + * + * Copied from arch/ppc/syslib/cpm2_pic.c with minor subsequent updates + * to make in work in arch/powerpc/. Original (c) belongs to Dan Malek. + * + * Author: Vitaly Bordug + * + * 1999-2001 (c) Dan Malek + * 2006 (c) MontaVista Software, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/* The CPM2 internal interrupt controller. It is usually + * the only interrupt controller. + * There are two 32-bit registers (high/low) for up to 64 + * possible interrupts. + * + * Now, the fun starts.....Interrupt Numbers DO NOT MAP + * in a simple arithmetic fashion to mask or pending registers. + * That is, interrupt 4 does not map to bit position 4. + * We create two tables, indexed by vector number, to indicate + * which register to use and which bit in the register to use. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "cpm2_pic.h" + +static struct device_node *cpm2_pic_node; +static struct irq_host *cpm2_pic_host; +#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) +static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; + +static const u_char irq_to_siureg[] = { + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 1, 1, 1, 1, 1, 1, 1, 1, + 1, 1, 1, 1, 1, 1, 1, 1, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0 +}; + +/* bit numbers do not match the docs, these are precomputed so the bit for + * a given irq is (1 << irq_to_siubit[irq]) */ +static const u_char irq_to_siubit[] = { + 0, 15, 14, 13, 12, 11, 10, 9, + 8, 7, 6, 5, 4, 3, 2, 1, + 2, 1, 0, 14, 13, 12, 11, 10, + 9, 8, 7, 6, 5, 4, 3, 0, + 31, 30, 29, 28, 27, 26, 25, 24, + 23, 22, 21, 20, 19, 18, 17, 16, + 16, 17, 18, 19, 20, 21, 22, 23, + 24, 25, 26, 27, 28, 29, 30, 31, +}; + +static void cpm2_mask_irq(unsigned int irq_nr) +{ + int bit, word; + volatile uint *simr; + + irq_nr -= CPM_IRQ_OFFSET; + + bit = irq_to_siubit[irq_nr]; + word = irq_to_siureg[irq_nr]; + + simr = &(cpm2_immr->im_intctl.ic_simrh); + ppc_cached_irq_mask[word] &= ~(1 << bit); + simr[word] = ppc_cached_irq_mask[word]; +} + +static void cpm2_unmask_irq(unsigned int irq_nr) +{ + int bit, word; + volatile uint *simr; + + irq_nr -= CPM_IRQ_OFFSET; + + bit = irq_to_siubit[irq_nr]; + word = irq_to_siureg[irq_nr]; + + simr = &(cpm2_immr->im_intctl.ic_simrh); + ppc_cached_irq_mask[word] |= 1 << bit; + simr[word] = ppc_cached_irq_mask[word]; +} + +static void cpm2_mask_and_ack(unsigned int irq_nr) +{ + int bit, word; + volatile uint *simr, *sipnr; + + irq_nr -= CPM_IRQ_OFFSET; + + bit = irq_to_siubit[irq_nr]; + word = irq_to_siureg[irq_nr]; + + simr = &(cpm2_immr->im_intctl.ic_simrh); + sipnr = &(cpm2_immr->im_intctl.ic_sipnrh); + ppc_cached_irq_mask[word] &= ~(1 << bit); + simr[word] = ppc_cached_irq_mask[word]; + sipnr[word] = 1 << bit; +} + +static void cpm2_end_irq(unsigned int irq_nr) +{ + int bit, word; + volatile uint *simr; + + if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) + && irq_desc[irq_nr].action) { + + irq_nr -= CPM_IRQ_OFFSET; + bit = irq_to_siubit[irq_nr]; + word = irq_to_siureg[irq_nr]; + + simr = &(cpm2_immr->im_intctl.ic_simrh); + ppc_cached_irq_mask[word] |= 1 << bit; + simr[word] = ppc_cached_irq_mask[word]; + /* + * Work around large numbers of spurious IRQs on PowerPC 82xx + * systems. + */ + mb(); + } +} + +static struct irq_chip cpm2_pic = { + .typename = " CPM2 SIU ", + .enable = cpm2_unmask_irq, + .disable = cpm2_mask_irq, + .unmask = cpm2_unmask_irq, + .mask_ack = cpm2_mask_and_ack, + .end = cpm2_end_irq, +}; + +int cpm2_get_irq(struct pt_regs *regs) +{ + int irq; + unsigned long bits; + + /* For CPM2, read the SIVEC register and shift the bits down + * to get the irq number.*/ + bits = cpm2_immr->im_intctl.ic_sivec; + irq = bits >> 26; + + if (irq == 0) + return(-1); + return irq+CPM_IRQ_OFFSET; +} + +static int cpm2_pic_host_match(struct irq_host *h, struct device_node *node) +{ + return cpm2_pic_node == NULL || cpm2_pic_node == node; +} + +static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq, + irq_hw_number_t hw) +{ + pr_debug("cpm2_pic_host_map(%d, 0x%lx)\n", virq, hw); + + get_irq_desc(virq)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(virq, &cpm2_pic, handle_level_irq); + return 0; +} + +static void cpm2_host_unmap(struct irq_host *h, unsigned int virq) +{ + /* Make sure irq is masked in hardware */ + cpm2_mask_irq(virq); + + /* remove chip and handler */ + set_irq_chip_and_handler(virq, NULL, NULL); +} + +static int cpm2_pic_host_xlate(struct irq_host *h, struct device_node *ct, + u32 *intspec, unsigned int intsize, + irq_hw_number_t *out_hwirq, unsigned int *out_flags) +{ + static const unsigned char map_cpm2_senses[4] = { + IRQ_TYPE_LEVEL_LOW, + IRQ_TYPE_LEVEL_HIGH, + IRQ_TYPE_EDGE_FALLING, + IRQ_TYPE_EDGE_RISING, + }; + + *out_hwirq = intspec[0]; + if (intsize > 1 && intspec[1] < 4) + *out_flags = map_cpm2_senses[intspec[1]]; + else + *out_flags = IRQ_TYPE_NONE; + + return 0; +} + +static struct irq_host_ops cpm2_pic_host_ops = { + .match = cpm2_pic_host_match, + .map = cpm2_pic_host_map, + .unmap = cpm2_host_unmap, + .xlate = cpm2_pic_host_xlate, +}; + +void cpm2_pic_init(struct device_node *node) +{ + int i; + + /* Clear the CPM IRQ controller, in case it has any bits set + * from the bootloader + */ + + /* Mask out everything */ + + cpm2_immr->im_intctl.ic_simrh = 0x00000000; + cpm2_immr->im_intctl.ic_simrl = 0x00000000; + + wmb(); + + /* Ack everything */ + cpm2_immr->im_intctl.ic_sipnrh = 0xffffffff; + cpm2_immr->im_intctl.ic_sipnrl = 0xffffffff; + wmb(); + + /* Dummy read of the vector */ + i = cpm2_immr->im_intctl.ic_sivec; + rmb(); + + /* Initialize the default interrupt mapping priorities, + * in case the boot rom changed something on us. + */ + cpm2_immr->im_intctl.ic_sicr = 0; + cpm2_immr->im_intctl.ic_scprrh = 0x05309770; + cpm2_immr->im_intctl.ic_scprrl = 0x05309770; + + /* create a legacy host */ + if (node) + cpm2_pic_node = of_node_get(node); + + cpm2_pic_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 64, &cpm2_pic_host_ops, 64); + if (cpm2_pic_host == NULL) { + printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n"); + return; + } +} diff --git a/arch/powerpc/sysdev/cpm2_pic.h b/arch/powerpc/sysdev/cpm2_pic.h new file mode 100644 index 000000000000..436cca77db64 --- /dev/null +++ b/arch/powerpc/sysdev/cpm2_pic.h @@ -0,0 +1,8 @@ +#ifndef _PPC_KERNEL_CPM2_H +#define _PPC_KERNEL_CPM2_H + +extern int cpm2_get_irq(struct pt_regs *regs); + +extern void cpm2_pic_init(struct device_node*); + +#endif /* _PPC_KERNEL_CPM2_H */ -- cgit v1.2.3 From 902f392d011d0a781ea4695c464345faa6664540 Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Thu, 21 Sep 2006 22:31:26 +0400 Subject: POWERPC: Add support for the mpc8560 eval board This makes the 8560 evaluation board fully supported under arch/powerpc, as the first board with CPM2 SoC peripherals. The brand new devicetree nodes are introduced (intending to be a subset of the QuiccEngine-equipped models, with dts sources placed into the kernel according to the new convention. Assuming all the preceding stuff applied (PAL+fs_enet related+ CPM_UART update), the both TSEC eth ,FCC Eths, and both SCC UARTs are working. The relevant drivers are still capable to drive users in ppc, which was verified with 8272ADS (SCC uart+FCC eth). This is also verified on mpc8540 and actually make it work (PCI stuff working as well) Signed-off-by: Vitaly Bordug --- arch/powerpc/boot/dts/mpc8560ads.dts | 302 ++++++++++ arch/powerpc/configs/mpc8560_ads_defconfig | 854 +++++++++++++++++++++++++++++ arch/powerpc/platforms/85xx/Kconfig | 21 + arch/powerpc/platforms/85xx/Makefile | 1 + arch/powerpc/platforms/85xx/mpc85xx_ads.c | 109 ++++ arch/powerpc/platforms/85xx/mpc85xx_ads.h | 61 +++ 6 files changed, 1348 insertions(+) create mode 100644 arch/powerpc/boot/dts/mpc8560ads.dts create mode 100644 arch/powerpc/configs/mpc8560_ads_defconfig create mode 100644 arch/powerpc/platforms/85xx/mpc85xx_ads.h (limited to 'arch') diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts new file mode 100644 index 000000000000..ba5c943a6fe9 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8560ads.dts @@ -0,0 +1,302 @@ +/* + * MPC8560 ADS Device Tree Source + * + * Copyright 2006 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + + +/ { + model = "MPC8560ADS"; + compatible = "MPC85xxADS"; + #address-cells = <1>; + #size-cells = <1>; + linux,phandle = <100>; + + cpus { + #cpus = <1>; + #address-cells = <1>; + #size-cells = <0>; + linux,phandle = <200>; + + PowerPC,8560@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <20>; // 32 bytes + i-cache-line-size = <20>; // 32 bytes + d-cache-size = <8000>; // L1, 32K + i-cache-size = <8000>; // L1, 32K + timebase-frequency = <04ead9a0>; + bus-frequency = <13ab6680>; + clock-frequency = <312c8040>; + 32-bit; + linux,phandle = <201>; + linux,boot-cpu; + }; + }; + + memory { + device_type = "memory"; + linux,phandle = <300>; + reg = <00000000 10000000>; + }; + + soc8560@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + device_type = "soc"; + ranges = <0 e0000000 00100000>; + reg = ; + bus-frequency = <13ab6680>; + + mdio@24520 { + device_type = "mdio"; + compatible = "gianfar"; + reg = <24520 20>; + linux,phandle = <24520>; + #address-cells = <1>; + #size-cells = <0>; + ethernet-phy@0 { + linux,phandle = <2452000>; + interrupt-parent = <40000>; + interrupts = <35 1>; + reg = <0>; + device_type = "ethernet-phy"; + }; + ethernet-phy@1 { + linux,phandle = <2452001>; + interrupt-parent = <40000>; + interrupts = <35 1>; + reg = <1>; + device_type = "ethernet-phy"; + }; + ethernet-phy@2 { + linux,phandle = <2452002>; + interrupt-parent = <40000>; + interrupts = <37 1>; + reg = <2>; + device_type = "ethernet-phy"; + }; + ethernet-phy@3 { + linux,phandle = <2452003>; + interrupt-parent = <40000>; + interrupts = <37 1>; + reg = <3>; + device_type = "ethernet-phy"; + }; + }; + + ethernet@24000 { + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <24000 1000>; + address = [ 00 00 0C 00 00 FD ]; + interrupts = ; + interrupt-parent = <40000>; + phy-handle = <2452000>; + }; + + ethernet@25000 { + #address-cells = <1>; + #size-cells = <0>; + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <25000 1000>; + address = [ 00 00 0C 00 01 FD ]; + interrupts = <13 2 14 2 18 2>; + interrupt-parent = <40000>; + phy-handle = <2452001>; + }; + + pci@8000 { + linux,phandle = <8000>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "85xx"; + device_type = "pci"; + reg = <8000 400>; + clock-frequency = <3f940aa>; + interrupt-map-mask = ; + interrupt-map = < + + /* IDSEL 0x2 */ + 1000 0 0 1 40000 31 1 + 1000 0 0 2 40000 32 1 + 1000 0 0 3 40000 33 1 + 1000 0 0 4 40000 34 1 + + /* IDSEL 0x3 */ + 1800 0 0 1 40000 34 1 + 1800 0 0 2 40000 31 1 + 1800 0 0 3 40000 32 1 + 1800 0 0 4 40000 33 1 + + /* IDSEL 0x4 */ + 2000 0 0 1 40000 33 1 + 2000 0 0 2 40000 34 1 + 2000 0 0 3 40000 31 1 + 2000 0 0 4 40000 32 1 + + /* IDSEL 0x5 */ + 2800 0 0 1 40000 32 1 + 2800 0 0 2 40000 33 1 + 2800 0 0 3 40000 34 1 + 2800 0 0 4 40000 31 1 + + /* IDSEL 12 */ + 6000 0 0 1 40000 31 1 + 6000 0 0 2 40000 32 1 + 6000 0 0 3 40000 33 1 + 6000 0 0 4 40000 34 1 + + /* IDSEL 13 */ + 6800 0 0 1 40000 34 1 + 6800 0 0 2 40000 31 1 + 6800 0 0 3 40000 32 1 + 6800 0 0 4 40000 33 1 + + /* IDSEL 14*/ + 7000 0 0 1 40000 33 1 + 7000 0 0 2 40000 34 1 + 7000 0 0 3 40000 31 1 + 7000 0 0 4 40000 32 1 + + /* IDSEL 15 */ + 7800 0 0 1 40000 32 1 + 7800 0 0 2 40000 33 1 + 7800 0 0 3 40000 34 1 + 7800 0 0 4 40000 31 1 + + /* IDSEL 18 */ + 9000 0 0 1 40000 31 1 + 9000 0 0 2 40000 32 1 + 9000 0 0 3 40000 33 1 + 9000 0 0 4 40000 34 1 + + /* IDSEL 19 */ + 9800 0 0 1 40000 34 1 + 9800 0 0 2 40000 31 1 + 9800 0 0 3 40000 32 1 + 9800 0 0 4 40000 33 1 + + /* IDSEL 20 */ + a000 0 0 1 40000 33 1 + a000 0 0 2 40000 34 1 + a000 0 0 3 40000 31 1 + a000 0 0 4 40000 32 1 + + /* IDSEL 21 */ + a800 0 0 1 40000 32 1 + a800 0 0 2 40000 33 1 + a800 0 0 3 40000 34 1 + a800 0 0 4 40000 31 1>; + + interrupt-parent = <40000>; + interrupts = <42 0>; + bus-range = <0 0>; + ranges = <02000000 0 80000000 80000000 0 20000000 + 01000000 0 00000000 e2000000 0 01000000>; + }; + + pic@40000 { + linux,phandle = <40000>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <40000 20100>; + built-in; + device_type = "open-pic"; + }; + + cpm@e0000000 { + linux,phandle = ; + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + device_type = "cpm"; + model = "CPM2"; + ranges = <0 0 c0000>; + reg = <80000 40000>; + command-proc = <919c0>; + brg-frequency = <9d5b340>; + + pic@90c00 { + linux,phandle = <90c00>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + interrupts = <1e 0>; + interrupt-parent = <40000>; + reg = <90c00 80>; + built-in; + device_type = "cpm-pic"; + }; + + scc@91a00 { + device_type = "serial"; + compatible = "cpm_uart"; + model = "SCC"; + device-id = <2>; + reg = <91a00 20 88000 100>; + clock-setup = <00ffffff 0>; + rx-clock = <1>; + tx-clock = <1>; + current-speed = <1c200>; + interrupts = <64 1>; + interrupt-parent = <90c00>; + }; + + scc@91a20 { + device_type = "serial"; + compatible = "cpm_uart"; + model = "SCC"; + device-id = <3>; + reg = <91a20 20 88100 100>; + clock-setup = ; + rx-clock = <2>; + tx-clock = <2>; + current-speed = <1c200>; + interrupts = <65 1>; + interrupt-parent = <90c00>; + }; + + fcc@91320 { + device_type = "network"; + compatible = "fs_enet"; + model = "FCC"; + device-id = <3>; + reg = <91320 20 88500 100 913a0 30>; + mac-address = [ 00 00 0C 00 02 FD ]; + clock-setup = ; + rx-clock = <15>; + tx-clock = <16>; + interrupts = <5d 1>; + interrupt-parent = <90c00>; + phy-handle = <2452002>; + }; + + fcc@91340 { + device_type = "network"; + compatible = "fs_enet"; + model = "FCC"; + device-id = <4>; + reg = <91340 20 88600 100 913d0 30>; + mac-address = [ 00 00 0C 00 03 FD ]; + clock-setup = ; + rx-clock = <17>; + tx-clock = <18>; + interrupts = <5e 1>; + interrupt-parent = <90c00>; + phy-handle = <2452003>; + }; + }; + }; +}; diff --git a/arch/powerpc/configs/mpc8560_ads_defconfig b/arch/powerpc/configs/mpc8560_ads_defconfig new file mode 100644 index 000000000000..ddc2a7b07ba0 --- /dev/null +++ b/arch/powerpc/configs/mpc8560_ads_defconfig @@ -0,0 +1,854 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.18-rc4 +# Fri Aug 11 16:45:05 2006 +# +# CONFIG_PPC64 is not set +CONFIG_PPC32=y +CONFIG_PPC_MERGE=y +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_IRQ_PER_CPU=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +# CONFIG_PPC_UDBG_16550 is not set +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_DEFAULT_UIMAGE=y + +# +# Processor support +# +# CONFIG_CLASSIC32 is not set +# CONFIG_PPC_52xx is not set +# CONFIG_PPC_82xx is not set +# CONFIG_PPC_83xx is not set +CONFIG_PPC_85xx=y +# CONFIG_PPC_86xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_8xx is not set +# CONFIG_E200 is not set +CONFIG_85xx=y +CONFIG_E500=y +CONFIG_BOOKE=y +CONFIG_FSL_BOOKE=y +# CONFIG_PHYS_64BIT is not set +CONFIG_SPE=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_RT_MUTEXES=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +CONFIG_VM_EVENT_COUNTERS=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +# CONFIG_MODULES is not set + +# +# Block layer +# +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_MPIC=y +CONFIG_CPM2=y +# CONFIG_WANT_EARLY_SERIAL is not set + +# +# Platform support +# +# CONFIG_MPC8540_ADS is not set +CONFIG_MPC8560_ADS=y +# CONFIG_MPC85xx_CDS is not set +CONFIG_MPC8560=y +CONFIG_PPC_INDIRECT_PCI_BE=y + +# +# Kernel options +# +# CONFIG_HIGHMEM is not set +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_MISC=y +# CONFIG_MATH_EMULATION is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +# CONFIG_PC_KEYBOARD is not set +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +# CONFIG_PROC_DEVICETREE is not set +# CONFIG_CMDLINE_BOOL is not set +# CONFIG_PM is not set +# CONFIG_SOFTWARE_SUSPEND is not set +# CONFIG_SECCOMP is not set +CONFIG_ISA_DMA_API=y + +# +# Bus options +# +# CONFIG_PPC_I8259 is not set +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_FSL_SOC=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +# CONFIG_PCIEPORTBUS is not set +CONFIG_PCI_DEBUG=y + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PCI Hotplug Support +# +# CONFIG_HOTPLUG_PCI is not set + +# +# Advanced setup +# +# CONFIG_ADVANCED_OPTIONS is not set + +# +# Default settings for advanced configuration options are used +# +CONFIG_HIGHMEM_START=0xfe000000 +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_KERNEL_START=0xc0000000 +CONFIG_TASK_SIZE=0x80000000 +CONFIG_BOOT_LOAD=0x00800000 + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=32768 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Macintosh device drivers +# +# CONFIG_WINDFARM is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# PHY device support +# +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +CONFIG_MARVELL_PHY=y +CONFIG_DAVICOM_PHY=y +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_FIXED_PHY is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_NET_PCI is not set +CONFIG_FS_ENET=y +# CONFIG_FS_ENET_HAS_SCC is not set +CONFIG_FS_ENET_HAS_FCC=y + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +CONFIG_E1000=y +CONFIG_E1000_NAPI=y +# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +CONFIG_GIANFAR=y +CONFIG_GFAR_NAPI=y + +# +# Ethernet (10000 Mbit) +# +# CONFIG_CHELSIO_T1 is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_CPM=y +CONFIG_SERIAL_CPM_CONSOLE=y +CONFIG_SERIAL_CPM_SCC1=y +CONFIG_SERIAL_CPM_SCC2=y +# CONFIG_SERIAL_CPM_SCC3 is not set +# CONFIG_SERIAL_CPM_SCC4 is not set +# CONFIG_SERIAL_CPM_SMC1 is not set +# CONFIG_SERIAL_CPM_SMC2 is not set +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_BRIQ_PANEL is not set + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +CONFIG_GEN_RTC=y +# CONFIG_GEN_RTC_X is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# + +# +# Hardware Monitoring support +# +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_ABITUGURU is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Misc devices +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +CONFIG_VIDEO_V4L2=y + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +CONFIG_FIRMWARE_EDID=y +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# +# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) +# + +# +# Real Time Clock +# +# CONFIG_RTC_CLASS is not set + +# +# DMA Engine support +# +# CONFIG_DMA_ENGINE is not set + +# +# DMA Clients +# + +# +# DMA Devices +# + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +# CONFIG_MSDOS_PARTITION is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_PLIST=y + +# +# Instrumentation Support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_KERNEL=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_UNWIND_INFO is not set +CONFIG_FORCED_INLINING=y +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_DEBUGGER is not set +# CONFIG_KGDB_CONSOLE is not set +# CONFIG_BDI_SWITCH is not set +# CONFIG_BOOTX_TEXT is not set +# CONFIG_PPC_EARLY_DEBUG is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Hardware crypto devices +# diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index c3268d9877e4..0584f3c7e884 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig @@ -11,6 +11,12 @@ config MPC8540_ADS help This option enables support for the MPC 8540 ADS board +config MPC8560_ADS + bool "Freescale MPC8560 ADS" + select DEFAULT_UIMAGE + help + This option enables support for the MPC 8560 ADS board + config MPC85xx_CDS bool "Freescale MPC85xx CDS" select DEFAULT_UIMAGE @@ -25,6 +31,11 @@ config MPC8540 select PPC_INDIRECT_PCI default y if MPC8540_ADS || MPC85xx_CDS +config MPC8560 + bool + select PPC_INDIRECT_PCI + default y if MPC8560_ADS + config PPC_INDIRECT_PCI_BE bool depends on PPC_85xx @@ -34,4 +45,14 @@ config MPIC bool default y +config CPM2 + bool + depends on MPC8560 + default y + help + The CPM2 (Communications Processor Module) is a coprocessor on + embedded CPUs made by Motorola. Selecting this option means that + you wish to build a kernel for a machine with a CPM2 coprocessor + on it. + endmenu diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 7615aa59c78b..282f5d0d0152 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile @@ -3,4 +3,5 @@ # obj-$(CONFIG_PPC_85xx) += misc.o pci.o obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o +obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index cae6b73357d5..7ebfe74bde40 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c @@ -32,6 +32,12 @@ #include #include "mpc85xx.h" +#ifdef CONFIG_CPM2 +#include +#include +#include +#endif + #ifndef CONFIG_PCI unsigned long isa_io_base = 0; unsigned long isa_mem_base = 0; @@ -57,12 +63,29 @@ mpc85xx_pcibios_fixup(void) } #endif /* CONFIG_PCI */ +#ifdef CONFIG_CPM2 + +static void cpm2_cascade(unsigned int irq, struct irq_desc *desc, + struct pt_regs *regs) +{ + int cascade_irq; + + while ((cascade_irq = cpm2_get_irq(regs)) >= 0) { + generic_handle_irq(cascade_irq, regs); + } + desc->chip->eoi(irq); +} + +#endif /* CONFIG_CPM2 */ void __init mpc85xx_ads_pic_init(void) { struct mpic *mpic; struct resource r; struct device_node *np = NULL; +#ifdef CONFIG_CPM2 + int irq; +#endif np = of_find_node_by_type(np, "open-pic"); @@ -104,11 +127,92 @@ void __init mpc85xx_ads_pic_init(void) mpic_assign_isu(mpic, 14, r.start + 0x10100); mpic_init(mpic); + +#ifdef CONFIG_CPM2 + /* Setup CPM2 PIC */ + np = of_find_node_by_type(NULL, "cpm-pic"); + if (np == NULL) { + printk(KERN_ERR "PIC init: can not find cpm-pic node\n"); + return; + } + irq = irq_of_parse_and_map(np, 0); + + cpm2_pic_init(np); + set_irq_chained_handler(irq, cpm2_cascade); +#endif } /* * Setup the architecture */ +#ifdef CONFIG_CPM2 +static void init_fcc_ioports(void) +{ + struct immap *immap; + struct io_port *io; + u32 tempval; + + immap = cpm2_immr; + + io = &immap->im_ioport; + /* FCC2/3 are on the ports B/C. */ + tempval = in_be32(&io->iop_pdirb); + tempval &= ~PB2_DIRB0; + tempval |= PB2_DIRB1; + out_be32(&io->iop_pdirb, tempval); + + tempval = in_be32(&io->iop_psorb); + tempval &= ~PB2_PSORB0; + tempval |= PB2_PSORB1; + out_be32(&io->iop_psorb, tempval); + + tempval = in_be32(&io->iop_pparb); + tempval |= (PB2_DIRB0 | PB2_DIRB1); + out_be32(&io->iop_pparb, tempval); + + tempval = in_be32(&io->iop_pdirb); + tempval &= ~PB3_DIRB0; + tempval |= PB3_DIRB1; + out_be32(&io->iop_pdirb, tempval); + + tempval = in_be32(&io->iop_psorb); + tempval &= ~PB3_PSORB0; + tempval |= PB3_PSORB1; + out_be32(&io->iop_psorb, tempval); + + tempval = in_be32(&io->iop_pparb); + tempval |= (PB3_DIRB0 | PB3_DIRB1); + out_be32(&io->iop_pparb, tempval); + + tempval = in_be32(&io->iop_pdirc); + tempval |= PC3_DIRC1; + out_be32(&io->iop_pdirc, tempval); + + tempval = in_be32(&io->iop_pparc); + tempval |= PC3_DIRC1; + out_be32(&io->iop_pparc, tempval); + + /* Port C has clocks...... */ + tempval = in_be32(&io->iop_psorc); + tempval &= ~(CLK_TRX); + out_be32(&io->iop_psorc, tempval); + + tempval = in_be32(&io->iop_pdirc); + tempval &= ~(CLK_TRX); + out_be32(&io->iop_pdirc, tempval); + tempval = in_be32(&io->iop_pparc); + tempval |= (CLK_TRX); + out_be32(&io->iop_pparc, tempval); + + /* Configure Serial Interface clock routing. + * First, clear all FCC bits to zero, + * then set the ones we want. + */ + immap->im_cpmux.cmx_fcr &= ~(CPMUX_CLK_MASK); + immap->im_cpmux.cmx_fcr |= CPMUX_CLK_ROUTE; +} +#endif + static void __init mpc85xx_ads_setup_arch(void) { struct device_node *cpu; @@ -131,6 +235,11 @@ static void __init mpc85xx_ads_setup_arch(void) of_node_put(cpu); } +#ifdef CONFIG_CPM2 + cpm2_reset(); + init_fcc_ioports(); +#endif + #ifdef CONFIG_PCI for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) add_bridge(np); diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.h b/arch/powerpc/platforms/85xx/mpc85xx_ads.h new file mode 100644 index 000000000000..effcbf78f851 --- /dev/null +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.h @@ -0,0 +1,61 @@ +/* + * MPC85xx ADS board definitions + * + * Maintainer: Kumar Gala + * + * Copyright 2004 Freescale Semiconductor Inc. + * + * 2006 (c) MontaVista Software, Inc. + * Vitaly Bordug + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifndef __MACH_MPC85XXADS_H +#define __MACH_MPC85XXADS_H + +#include +#include +#include + +#define BCSR_ADDR ((uint)0xf8000000) +#define BCSR_SIZE ((uint)(32 * 1024)) + +#ifdef CONFIG_CPM2 + +#define MPC85xx_CPM_OFFSET (0x80000) + +#define CPM_MAP_ADDR (get_immrbase() + MPC85xx_CPM_OFFSET) +#define CPM_IRQ_OFFSET 60 + +#define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET) +#define SIU_INT_SMC2 ((uint)0x05+CPM_IRQ_OFFSET) +#define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET) +#define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET) +#define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET) +#define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET) + +/* FCC1 Clock Source Configuration. These can be + * redefined in the board specific file. + * Can only choose from CLK9-12 */ +#define F1_RXCLK 12 +#define F1_TXCLK 11 + +/* FCC2 Clock Source Configuration. These can be + * redefined in the board specific file. + * Can only choose from CLK13-16 */ +#define F2_RXCLK 13 +#define F2_TXCLK 14 + +/* FCC3 Clock Source Configuration. These can be + * redefined in the board specific file. + * Can only choose from CLK13-16 */ +#define F3_RXCLK 15 +#define F3_TXCLK 16 + +#endif /* CONFIG_CPM2 */ +#endif /* __MACH_MPC85XXADS_H */ -- cgit v1.2.3 From fc8e50e349aa722d9f97ed9ba30e324ede8fa408 Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Thu, 21 Sep 2006 22:37:58 +0400 Subject: POWERPC: Get rid of remapping the whole immr The stuff below cleans up the code attempting to remap the whole cpm2_immr early, as well as places happily assuming that fact. This is more like the 2.4 legacy stuff, and is at least confusing and unclear now. To keep the world comfortable, a new mechanism is introduced: before accessing specific immr register/register set, one needs to map it, using cpm2_map(), for instance, access to CPM command register will look like volatile cpm_cpm2_t *cp = cpm2_map(im_cpm); keeping the code clear, yet without "already defined somewhere" cpm2_immr. So far, unmapping code is not implemented, but it's not a big deal to add it, if the whole idea makes sense. Signed-off-by: Vitaly Bordug --- arch/powerpc/sysdev/cpm2_common.c | 19 ++++++++++++++----- arch/powerpc/sysdev/cpm2_pic.c | 34 +++++++++++++++++----------------- arch/powerpc/sysdev/cpm2_pic.h | 2 ++ arch/powerpc/sysdev/fsl_soc.c | 2 +- 4 files changed, 34 insertions(+), 23 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c index f7a04892400b..73376f9c1560 100644 --- a/arch/powerpc/sysdev/cpm2_common.c +++ b/arch/powerpc/sysdev/cpm2_common.c @@ -51,6 +51,7 @@ cpm_cpm2_t *cpmp; /* Pointer to comm processor space */ * the communication processor devices. */ cpm2_map_t *cpm2_immr; +intctl_cpm2_t *cpm2_intctl; #define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount of space for CPM as it is larger @@ -60,6 +61,7 @@ void cpm2_reset(void) { cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); + cpm2_intctl = cpm2_map(im_intctl); /* Reclaim the DP memory for our use. */ @@ -94,13 +96,15 @@ cpm_setbrg(uint brg, uint rate) /* This is good enough to get SMCs running..... */ if (brg < 4) { - bp = (uint *)&cpm2_immr->im_brgc1; + bp = cpm2_map_size(im_brgc1, 16); } else { - bp = (uint *)&cpm2_immr->im_brgc5; + bp = cpm2_map_size(im_brgc5, 16); brg -= 4; } bp += brg; *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN; + + cpm2_unmap(bp); } /* This function is used to set high speed synchronous baud rate @@ -112,16 +116,18 @@ cpm2_fastbrg(uint brg, uint rate, int div16) volatile uint *bp; if (brg < 4) { - bp = (uint *)&cpm2_immr->im_brgc1; + bp = cpm2_map_size(im_brgc1, 16); } else { - bp = (uint *)&cpm2_immr->im_brgc5; + bp = cpm2_map_size(im_brgc5, 16); brg -= 4; } bp += brg; *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN; if (div16) *bp |= CPM_BRG_DIV16; + + cpm2_unmap(bp); } /* @@ -132,11 +138,14 @@ static spinlock_t cpm_dpmem_lock; * until the memory subsystem goes up... */ static rh_block_t cpm_boot_dpmem_rh_block[16]; static rh_info_t cpm_dpmem_info; +static u8* im_dprambase; static void cpm2_dpinit(void) { spin_lock_init(&cpm_dpmem_lock); + im_dprambase = ioremap(CPM_MAP_ADDR, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE); + /* initialize the info header */ rh_init(&cpm_dpmem_info, 1, sizeof(cpm_boot_dpmem_rh_block) / @@ -205,6 +214,6 @@ EXPORT_SYMBOL(cpm_dpdump); void *cpm_dpram_addr(uint offset) { - return (void *)&cpm2_immr->im_dprambase[offset]; + return (void *)(im_dprambase + offset); } EXPORT_SYMBOL(cpm_dpram_addr); diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index c804475c07d3..51752990f7b9 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c @@ -78,7 +78,7 @@ static void cpm2_mask_irq(unsigned int irq_nr) bit = irq_to_siubit[irq_nr]; word = irq_to_siureg[irq_nr]; - simr = &(cpm2_immr->im_intctl.ic_simrh); + simr = &(cpm2_intctl->ic_simrh); ppc_cached_irq_mask[word] &= ~(1 << bit); simr[word] = ppc_cached_irq_mask[word]; } @@ -93,7 +93,7 @@ static void cpm2_unmask_irq(unsigned int irq_nr) bit = irq_to_siubit[irq_nr]; word = irq_to_siureg[irq_nr]; - simr = &(cpm2_immr->im_intctl.ic_simrh); + simr = &(cpm2_intctl->ic_simrh); ppc_cached_irq_mask[word] |= 1 << bit; simr[word] = ppc_cached_irq_mask[word]; } @@ -108,8 +108,8 @@ static void cpm2_mask_and_ack(unsigned int irq_nr) bit = irq_to_siubit[irq_nr]; word = irq_to_siureg[irq_nr]; - simr = &(cpm2_immr->im_intctl.ic_simrh); - sipnr = &(cpm2_immr->im_intctl.ic_sipnrh); + simr = &(cpm2_intctl->ic_simrh); + sipnr = &(cpm2_intctl->ic_sipnrh); ppc_cached_irq_mask[word] &= ~(1 << bit); simr[word] = ppc_cached_irq_mask[word]; sipnr[word] = 1 << bit; @@ -127,7 +127,7 @@ static void cpm2_end_irq(unsigned int irq_nr) bit = irq_to_siubit[irq_nr]; word = irq_to_siureg[irq_nr]; - simr = &(cpm2_immr->im_intctl.ic_simrh); + simr = &(cpm2_intctl->ic_simrh); ppc_cached_irq_mask[word] |= 1 << bit; simr[word] = ppc_cached_irq_mask[word]; /* @@ -152,10 +152,10 @@ int cpm2_get_irq(struct pt_regs *regs) int irq; unsigned long bits; - /* For CPM2, read the SIVEC register and shift the bits down - * to get the irq number.*/ - bits = cpm2_immr->im_intctl.ic_sivec; - irq = bits >> 26; + /* For CPM2, read the SIVEC register and shift the bits down + * to get the irq number. */ + bits = cpm2_intctl->ic_sivec; + irq = bits >> 26; if (irq == 0) return(-1); @@ -223,26 +223,26 @@ void cpm2_pic_init(struct device_node *node) /* Mask out everything */ - cpm2_immr->im_intctl.ic_simrh = 0x00000000; - cpm2_immr->im_intctl.ic_simrl = 0x00000000; + cpm2_intctl->ic_simrh = 0x00000000; + cpm2_intctl->ic_simrl = 0x00000000; wmb(); /* Ack everything */ - cpm2_immr->im_intctl.ic_sipnrh = 0xffffffff; - cpm2_immr->im_intctl.ic_sipnrl = 0xffffffff; + cpm2_intctl->ic_sipnrh = 0xffffffff; + cpm2_intctl->ic_sipnrl = 0xffffffff; wmb(); /* Dummy read of the vector */ - i = cpm2_immr->im_intctl.ic_sivec; + i = cpm2_intctl->ic_sivec; rmb(); /* Initialize the default interrupt mapping priorities, * in case the boot rom changed something on us. */ - cpm2_immr->im_intctl.ic_sicr = 0; - cpm2_immr->im_intctl.ic_scprrh = 0x05309770; - cpm2_immr->im_intctl.ic_scprrl = 0x05309770; + cpm2_intctl->ic_sicr = 0; + cpm2_intctl->ic_scprrh = 0x05309770; + cpm2_intctl->ic_scprrl = 0x05309770; /* create a legacy host */ if (node) diff --git a/arch/powerpc/sysdev/cpm2_pic.h b/arch/powerpc/sysdev/cpm2_pic.h index 436cca77db64..d63e45d4df58 100644 --- a/arch/powerpc/sysdev/cpm2_pic.h +++ b/arch/powerpc/sysdev/cpm2_pic.h @@ -1,6 +1,8 @@ #ifndef _PPC_KERNEL_CPM2_H #define _PPC_KERNEL_CPM2_H +extern intctl_cpm2_t *cpm2_intctl; + extern int cpm2_get_irq(struct pt_regs *regs); extern void cpm2_pic_init(struct device_node*); diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 0ed2aaee105c..0b8a03cc3042 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c @@ -633,7 +633,7 @@ static int __init fs_enet_of_init(void) if (strstr(model, "FCC")) { int fcc_index = fs_get_fcc_index(*id); - fs_enet_data.dpram_offset = (u32)cpm2_immr->im_dprambase; + fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0); fs_enet_data.rx_ring = 32; fs_enet_data.tx_ring = 32; fs_enet_data.rx_copybreak = 240; -- cgit v1.2.3 From d3465c921f79cfef0a4a8ceeeef9a3721bbbb57d Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Thu, 21 Sep 2006 22:38:05 +0400 Subject: POWERPC: overhaul with cpm2_map mechanism Incorporating the new way of cpm2 immr access, introduced in the previous patch, into CPM2 peripheral devices (fs_enet and cpm_uart). Both ppc and powerpc approved working( real actions taken in powerpc only, ppc just has a wrapper to keep init stuff consistent). Signed-off-by: Vitaly Bordug --- arch/powerpc/platforms/85xx/mpc85xx_ads.c | 109 ++++++++++++++++-------------- arch/powerpc/sysdev/cpm2_common.c | 90 ++++++++++++++++++++++++ arch/powerpc/sysdev/fsl_soc.c | 7 ++ arch/ppc/platforms/mpc8272ads_setup.c | 8 +-- arch/ppc/platforms/mpc866ads_setup.c | 8 +-- arch/ppc/platforms/mpc885ads_setup.c | 10 +-- 6 files changed, 170 insertions(+), 62 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index 7ebfe74bde40..28070e7ae507 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c @@ -33,6 +33,7 @@ #include "mpc85xx.h" #ifdef CONFIG_CPM2 +#include #include #include #include @@ -146,70 +147,81 @@ void __init mpc85xx_ads_pic_init(void) * Setup the architecture */ #ifdef CONFIG_CPM2 -static void init_fcc_ioports(void) +void init_fcc_ioports(struct fs_platform_info *fpi) { - struct immap *immap; - struct io_port *io; + struct io_port *io = cpm2_map(im_ioport); + int fcc_no = fs_get_fcc_index(fpi->fs_no); + int target; u32 tempval; - immap = cpm2_immr; - - io = &immap->im_ioport; - /* FCC2/3 are on the ports B/C. */ - tempval = in_be32(&io->iop_pdirb); - tempval &= ~PB2_DIRB0; - tempval |= PB2_DIRB1; - out_be32(&io->iop_pdirb, tempval); - - tempval = in_be32(&io->iop_psorb); - tempval &= ~PB2_PSORB0; - tempval |= PB2_PSORB1; - out_be32(&io->iop_psorb, tempval); - - tempval = in_be32(&io->iop_pparb); - tempval |= (PB2_DIRB0 | PB2_DIRB1); - out_be32(&io->iop_pparb, tempval); - - tempval = in_be32(&io->iop_pdirb); - tempval &= ~PB3_DIRB0; - tempval |= PB3_DIRB1; - out_be32(&io->iop_pdirb, tempval); - - tempval = in_be32(&io->iop_psorb); - tempval &= ~PB3_PSORB0; - tempval |= PB3_PSORB1; - out_be32(&io->iop_psorb, tempval); - - tempval = in_be32(&io->iop_pparb); - tempval |= (PB3_DIRB0 | PB3_DIRB1); - out_be32(&io->iop_pparb, tempval); - - tempval = in_be32(&io->iop_pdirc); - tempval |= PC3_DIRC1; - out_be32(&io->iop_pdirc, tempval); - - tempval = in_be32(&io->iop_pparc); - tempval |= PC3_DIRC1; - out_be32(&io->iop_pparc, tempval); + switch(fcc_no) { + case 1: + tempval = in_be32(&io->iop_pdirb); + tempval &= ~PB2_DIRB0; + tempval |= PB2_DIRB1; + out_be32(&io->iop_pdirb, tempval); + + tempval = in_be32(&io->iop_psorb); + tempval &= ~PB2_PSORB0; + tempval |= PB2_PSORB1; + out_be32(&io->iop_psorb, tempval); + + tempval = in_be32(&io->iop_pparb); + tempval |= (PB2_DIRB0 | PB2_DIRB1); + out_be32(&io->iop_pparb, tempval); + + target = CPM_CLK_FCC2; + break; + case 2: + tempval = in_be32(&io->iop_pdirb); + tempval &= ~PB3_DIRB0; + tempval |= PB3_DIRB1; + out_be32(&io->iop_pdirb, tempval); + + tempval = in_be32(&io->iop_psorb); + tempval &= ~PB3_PSORB0; + tempval |= PB3_PSORB1; + out_be32(&io->iop_psorb, tempval); + + tempval = in_be32(&io->iop_pparb); + tempval |= (PB3_DIRB0 | PB3_DIRB1); + out_be32(&io->iop_pparb, tempval); + + tempval = in_be32(&io->iop_pdirc); + tempval |= PC3_DIRC1; + out_be32(&io->iop_pdirc, tempval); + + tempval = in_be32(&io->iop_pparc); + tempval |= PC3_DIRC1; + out_be32(&io->iop_pparc, tempval); + + target = CPM_CLK_FCC3; + break; + default: + printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n"); + return; + } /* Port C has clocks...... */ tempval = in_be32(&io->iop_psorc); - tempval &= ~(CLK_TRX); + tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8)); out_be32(&io->iop_psorc, tempval); tempval = in_be32(&io->iop_pdirc); - tempval &= ~(CLK_TRX); + tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8)); out_be32(&io->iop_pdirc, tempval); tempval = in_be32(&io->iop_pparc); - tempval |= (CLK_TRX); + tempval |= (PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8)); out_be32(&io->iop_pparc, tempval); + cpm2_unmap(io); + /* Configure Serial Interface clock routing. - * First, clear all FCC bits to zero, + * First, clear FCC bits to zero, * then set the ones we want. */ - immap->im_cpmux.cmx_fcr &= ~(CPMUX_CLK_MASK); - immap->im_cpmux.cmx_fcr |= CPMUX_CLK_ROUTE; + cpm2_clk_setup(target, fpi->clk_rx, CPM_CLK_RX); + cpm2_clk_setup(target, fpi->clk_tx, CPM_CLK_TX); } #endif @@ -237,7 +249,6 @@ static void __init mpc85xx_ads_setup_arch(void) #ifdef CONFIG_CPM2 cpm2_reset(); - init_fcc_ioports(); #endif #ifdef CONFIG_PCI diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c index 73376f9c1560..ec265995d5d8 100644 --- a/arch/powerpc/sysdev/cpm2_common.c +++ b/arch/powerpc/sysdev/cpm2_common.c @@ -130,6 +130,96 @@ cpm2_fastbrg(uint brg, uint rate, int div16) cpm2_unmap(bp); } +int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode) +{ + int ret = 0; + int shift; + int i, bits = 0; + cpmux_t *im_cpmux; + u32 *reg; + u32 mask = 7; + u8 clk_map [24][3] = { + {CPM_CLK_FCC1, CPM_BRG5, 0}, + {CPM_CLK_FCC1, CPM_BRG6, 1}, + {CPM_CLK_FCC1, CPM_BRG7, 2}, + {CPM_CLK_FCC1, CPM_BRG8, 3}, + {CPM_CLK_FCC1, CPM_CLK9, 4}, + {CPM_CLK_FCC1, CPM_CLK10, 5}, + {CPM_CLK_FCC1, CPM_CLK11, 6}, + {CPM_CLK_FCC1, CPM_CLK12, 7}, + {CPM_CLK_FCC2, CPM_BRG5, 0}, + {CPM_CLK_FCC2, CPM_BRG6, 1}, + {CPM_CLK_FCC2, CPM_BRG7, 2}, + {CPM_CLK_FCC2, CPM_BRG8, 3}, + {CPM_CLK_FCC2, CPM_CLK13, 4}, + {CPM_CLK_FCC2, CPM_CLK14, 5}, + {CPM_CLK_FCC2, CPM_CLK15, 6}, + {CPM_CLK_FCC2, CPM_CLK16, 7}, + {CPM_CLK_FCC3, CPM_BRG5, 0}, + {CPM_CLK_FCC3, CPM_BRG6, 1}, + {CPM_CLK_FCC3, CPM_BRG7, 2}, + {CPM_CLK_FCC3, CPM_BRG8, 3}, + {CPM_CLK_FCC3, CPM_CLK13, 4}, + {CPM_CLK_FCC3, CPM_CLK14, 5}, + {CPM_CLK_FCC3, CPM_CLK15, 6}, + {CPM_CLK_FCC3, CPM_CLK16, 7} + }; + + im_cpmux = cpm2_map(im_cpmux); + + switch (target) { + case CPM_CLK_SCC1: + reg = &im_cpmux->cmx_scr; + shift = 24; + case CPM_CLK_SCC2: + reg = &im_cpmux->cmx_scr; + shift = 16; + break; + case CPM_CLK_SCC3: + reg = &im_cpmux->cmx_scr; + shift = 8; + break; + case CPM_CLK_SCC4: + reg = &im_cpmux->cmx_scr; + shift = 0; + break; + case CPM_CLK_FCC1: + reg = &im_cpmux->cmx_fcr; + shift = 24; + break; + case CPM_CLK_FCC2: + reg = &im_cpmux->cmx_fcr; + shift = 16; + break; + case CPM_CLK_FCC3: + reg = &im_cpmux->cmx_fcr; + shift = 8; + break; + default: + printk(KERN_ERR "cpm2_clock_setup: invalid clock target\n"); + return -EINVAL; + } + + if (mode == CPM_CLK_RX) + shift +=3; + + for (i=0; i<24; i++) { + if (clk_map[i][0] == target && clk_map[i][1] == clock) { + bits = clk_map[i][2]; + break; + } + } + if (i == sizeof(clk_map)/3) + ret = -EINVAL; + + bits <<= shift; + mask <<= shift; + out_be32(reg, (in_be32(reg) & ~mask) | bits); + + cpm2_unmap(im_cpmux); + return ret; +} + /* * dpalloc / dpfree bits. */ diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 0b8a03cc3042..4e72bb983636 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c @@ -36,6 +36,7 @@ #include #include +extern void init_fcc_ioports(struct fs_platform_info*); static phys_addr_t immrbase = -1; phys_addr_t get_immrbase(void) @@ -630,6 +631,9 @@ static int __init fs_enet_of_init(void) goto unreg; } + fs_enet_data.clk_rx = *((u32 *) get_property(np, "rx-clock", NULL)); + fs_enet_data.clk_tx = *((u32 *) get_property(np, "tx-clock", NULL)); + if (strstr(model, "FCC")) { int fcc_index = fs_get_fcc_index(*id); @@ -646,6 +650,7 @@ static int __init fs_enet_of_init(void) snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x", (u32)res.start, fs_enet_data.phy_addr); fs_enet_data.bus_id = (char*)&bus_id[(*id)]; + fs_enet_data.init_ioports = init_fcc_ioports; } of_node_put(phy); @@ -717,6 +722,8 @@ static int __init cpm_uart_of_init(void) cpm_uart_data.tx_buf_size = 32; cpm_uart_data.rx_num_fifo = 4; cpm_uart_data.rx_buf_size = 32; + cpm_uart_data.clk_rx = *((u32 *) get_property(np, "rx-clock", NULL)); + cpm_uart_data.clk_tx = *((u32 *) get_property(np, "tx-clock", NULL)); ret = platform_device_add_data(cpm_uart_dev, &cpm_uart_data, diff --git a/arch/ppc/platforms/mpc8272ads_setup.c b/arch/ppc/platforms/mpc8272ads_setup.c index 2a35fe2b9b96..d5d36c372c8e 100644 --- a/arch/ppc/platforms/mpc8272ads_setup.c +++ b/arch/ppc/platforms/mpc8272ads_setup.c @@ -103,7 +103,7 @@ static struct fs_platform_info mpc82xx_enet_pdata[] = { }, }; -static void init_fcc1_ioports(void) +static void init_fcc1_ioports(struct fs_platform_info*) { struct io_port *io; u32 tempval; @@ -144,7 +144,7 @@ static void init_fcc1_ioports(void) iounmap(immap); } -static void init_fcc2_ioports(void) +static void init_fcc2_ioports(struct fs_platform_info*) { cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t)); u32 *bcsr = ioremap(BCSR_ADDR+12, sizeof(u32)); @@ -229,7 +229,7 @@ static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev, } } -static void init_scc1_uart_ioports(void) +static void init_scc1_uart_ioports(struct fs_uart_platform_info*) { cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t)); @@ -246,7 +246,7 @@ static void init_scc1_uart_ioports(void) iounmap(immap); } -static void init_scc4_uart_ioports(void) +static void init_scc4_uart_ioports(struct fs_uart_platform_info*) { cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t)); diff --git a/arch/ppc/platforms/mpc866ads_setup.c b/arch/ppc/platforms/mpc866ads_setup.c index e12cece4c9fd..5f130dca3770 100644 --- a/arch/ppc/platforms/mpc866ads_setup.c +++ b/arch/ppc/platforms/mpc866ads_setup.c @@ -137,7 +137,7 @@ void __init board_init(void) iounmap(bcsr_io); } -static void setup_fec1_ioports(void) +static void setup_fec1_ioports(struct fs_platform_info*) { immap_t *immap = (immap_t *) IMAP_ADDR; @@ -145,7 +145,7 @@ static void setup_fec1_ioports(void) setbits16(&immap->im_ioport.iop_pddir, 0x1fff); } -static void setup_scc1_ioports(void) +static void setup_scc1_ioports(struct fs_platform_info*) { immap_t *immap = (immap_t *) IMAP_ADDR; unsigned *bcsr_io; @@ -194,7 +194,7 @@ static void setup_scc1_ioports(void) } -static void setup_smc1_ioports(void) +static void setup_smc1_ioports(struct fs_uart_platform_info*) { immap_t *immap = (immap_t *) IMAP_ADDR; unsigned *bcsr_io; @@ -216,7 +216,7 @@ static void setup_smc1_ioports(void) } -static void setup_smc2_ioports(void) +static void setup_smc2_ioports(struct fs_uart_platform_info*) { immap_t *immap = (immap_t *) IMAP_ADDR; unsigned *bcsr_io; diff --git a/arch/ppc/platforms/mpc885ads_setup.c b/arch/ppc/platforms/mpc885ads_setup.c index 5dfa4e6c2af0..bf388ed04d46 100644 --- a/arch/ppc/platforms/mpc885ads_setup.c +++ b/arch/ppc/platforms/mpc885ads_setup.c @@ -161,7 +161,7 @@ void __init board_init(void) #endif } -static void setup_fec1_ioports(void) +static void setup_fec1_ioports(struct fs_platform_info*) { immap_t *immap = (immap_t *) IMAP_ADDR; @@ -181,7 +181,7 @@ static void setup_fec1_ioports(void) clrbits32(&immap->im_cpm.cp_cptr, 0x00000100); } -static void setup_fec2_ioports(void) +static void setup_fec2_ioports(struct fs_platform_info*) { immap_t *immap = (immap_t *) IMAP_ADDR; @@ -193,7 +193,7 @@ static void setup_fec2_ioports(void) clrbits32(&immap->im_cpm.cp_cptr, 0x00000080); } -static void setup_scc3_ioports(void) +static void setup_scc3_ioports(struct fs_platform_info*) { immap_t *immap = (immap_t *) IMAP_ADDR; unsigned *bcsr_io; @@ -315,7 +315,7 @@ static void __init mpc885ads_fixup_scc_enet_pdata(struct platform_device *pdev, mpc885ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); } -static void setup_smc1_ioports(void) +static void setup_smc1_ioports(struct fs_uart_platform_info*) { immap_t *immap = (immap_t *) IMAP_ADDR; unsigned *bcsr_io; @@ -335,7 +335,7 @@ static void setup_smc1_ioports(void) clrbits16(&immap->im_cpm.cp_pbodr, iobits); } -static void setup_smc2_ioports(void) +static void setup_smc2_ioports(struct fs_uart_platform_info*) { immap_t *immap = (immap_t *) IMAP_ADDR; unsigned *bcsr_io; -- cgit v1.2.3 From 611a15afcdaacec6efba984c7eb089b853564bdf Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Thu, 21 Sep 2006 22:38:05 +0400 Subject: POWERPC: Bring the fs_no calculation to the relevant SoC enumeration The fs_no mean used to be fs_enet driver driven, hence it was an enumeration across all the possible fs_enet "users" in the SoC. Now, with QE on the pipeline, and to make DTS descriptions more clear, fs_no features relevant SoC part number, with additional field to describe the SoC type. Another reason for that is now not only fs_enet is going to utilize those stuff. There might be UART, HLDC, and even USB, so to prevent confusion and be ready for upcoming OF_device transfer, fs_enet and cpm_uart drivers were updated in that concern, as well as the relevant DTS. Signed-off-by: Vitaly Bordug --- arch/powerpc/boot/dts/mpc8560ads.dts | 8 ++++---- arch/powerpc/sysdev/fsl_soc.c | 8 +++++++- 2 files changed, 11 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts index ba5c943a6fe9..2b168486aeba 100644 --- a/arch/powerpc/boot/dts/mpc8560ads.dts +++ b/arch/powerpc/boot/dts/mpc8560ads.dts @@ -244,7 +244,7 @@ device_type = "serial"; compatible = "cpm_uart"; model = "SCC"; - device-id = <2>; + device-id = <1>; reg = <91a00 20 88000 100>; clock-setup = <00ffffff 0>; rx-clock = <1>; @@ -258,7 +258,7 @@ device_type = "serial"; compatible = "cpm_uart"; model = "SCC"; - device-id = <3>; + device-id = <2>; reg = <91a20 20 88100 100>; clock-setup = ; rx-clock = <2>; @@ -272,7 +272,7 @@ device_type = "network"; compatible = "fs_enet"; model = "FCC"; - device-id = <3>; + device-id = <2>; reg = <91320 20 88500 100 913a0 30>; mac-address = [ 00 00 0C 00 02 FD ]; clock-setup = ; @@ -287,7 +287,7 @@ device_type = "network"; compatible = "fs_enet"; model = "FCC"; - device-id = <4>; + device-id = <3>; reg = <91340 20 88600 100 913d0 30>; mac-address = [ 00 00 0C 00 03 FD ]; clock-setup = ; diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 4e72bb983636..022ed275ea68 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c @@ -622,6 +622,7 @@ static int __init fs_enet_of_init(void) id = get_property(np, "device-id", NULL); fs_enet_data.fs_no = *id; + strcpy(fs_enet_data.fs_type, model); mdio = of_get_parent(phy); ret = of_address_to_resource(mdio, 0, &res); @@ -635,7 +636,7 @@ static int __init fs_enet_of_init(void) fs_enet_data.clk_tx = *((u32 *) get_property(np, "tx-clock", NULL)); if (strstr(model, "FCC")) { - int fcc_index = fs_get_fcc_index(*id); + int fcc_index = *id - 1; fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0); fs_enet_data.rx_ring = 32; @@ -688,6 +689,7 @@ static int __init cpm_uart_of_init(void) struct resource r[3]; struct fs_uart_platform_info cpm_uart_data; const int *id; + const char *model; memset(r, 0, sizeof(r)); memset(&cpm_uart_data, 0, sizeof(cpm_uart_data)); @@ -716,6 +718,10 @@ static int __init cpm_uart_of_init(void) id = get_property(np, "device-id", NULL); cpm_uart_data.fs_no = *id; + + model = (char*)get_property(np, "model", NULL); + strcpy(cpm_uart_data.fs_type, model); + cpm_uart_data.uart_clk = ppc_proc_freq; cpm_uart_data.tx_num_fifo = 4; -- cgit v1.2.3