From 8bf50f71cbfc7d043f0f135da72b3feefeaa0eb8 Mon Sep 17 00:00:00 2001 From: "Mike Miller (OS Dev)" Date: Wed, 17 Oct 2007 10:10:04 +0200 Subject: cciss: disable DMA refetch on Smart Array P600 This patch disables DMA refetch in the PCI bridge. We have disabled DMA prefetch for quite some time. Testing with XEN revealed another ASIC bug. If dom0 resides on a P600 the board can can an MCA bi accessing invalid memory addresses. Apparently, we need to disable both prefetch and refetch. My understanding is a refetch operation should not occur but it is a valid thing to do if prefetched data is no longer available for whatever reason. Please consider this patch for inclusion. Signed-off-by: Mike Miller Signed-off-by: Alex Chiang -------------------------------------------------------------------------------- Signed-off-by: Jens Axboe --- drivers/block/cciss.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'drivers/block') diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c index 3fb7e8bc436d..e330c26c5ad9 100644 --- a/drivers/block/cciss.c +++ b/drivers/block/cciss.c @@ -3035,15 +3035,20 @@ static int cciss_pci_init(ctlr_info_t *c, struct pci_dev *pdev) } #endif - /* Disabling DMA prefetch for the P600 - * An ASIC bug may result in a prefetch beyond - * physical memory. + /* Disabling DMA prefetch and refetch for the P600. + * An ASIC bug may result in accesses to invalid memory addresses. + * We've disabled prefetch for some time now. Testing with XEN + * kernels revealed a bug in the refetch if dom0 resides on a P600. */ if(board_id == 0x3225103C) { __u32 dma_prefetch; + __u32 dma_refetch; dma_prefetch = readl(c->vaddr + I2O_DMA1_CFG); dma_prefetch |= 0x8000; writel(dma_prefetch, c->vaddr + I2O_DMA1_CFG); + pci_read_config_dword(pdev, PCI_COMMAND_PARITY, &dma_refetch); + dma_refetch |= 0x1; + pci_write_config_dword(pdev, PCI_COMMAND_PARITY, dma_refetch); } #ifdef CCISS_DEBUG -- cgit v1.2.3