From e45098d703fbb9a7b02eae581aadb684b31e0eec Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 15 May 2017 10:35:04 -0700 Subject: clk: bcm2835: Correct the prediv logic If a clock has the prediv flag set, both the integer and fractional parts must be scaled when calculating the resulting frequency. Signed-off-by: Phil Elwell Signed-off-by: Eric Anholt Signed-off-by: Stephen Boyd --- drivers/clk/bcm/clk-bcm2835.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers/clk/bcm/clk-bcm2835.c') diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index 025853870619..7a35df6b45bd 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -616,8 +616,10 @@ static unsigned long bcm2835_pll_get_rate(struct clk_hw *hw, using_prediv = cprman_read(cprman, data->ana_reg_base + 4) & data->ana->fb_prediv_mask; - if (using_prediv) + if (using_prediv) { ndiv *= 2; + fdiv *= 2; + } return bcm2835_pll_rate_from_divisors(parent_rate, ndiv, fdiv, pdiv); } -- cgit v1.2.3