From bae71de51b8901372d7ed5c6b89d32282db7e9ed Mon Sep 17 00:00:00 2001 From: Georgi Vlaev Date: Fri, 15 Apr 2022 22:03:43 +0300 Subject: clk: keystone: syscon-clk: Add support for AM62 epwm-tbclk AM62 has 3 instances of EPWM modules. Each EPWM module has an EPWM TBCLKEN module input used to individually enable or disable its EPWM time-base clock. The EPWM time-base clock enable input comes from the CTRLMMR_EPWM_TB_CLKEN register bits 0 to 2 in CTRL_MMR0 module (6.1.1.4.1.48 [1]). This is virtually the same setup as in AM64 but with 3 instead of 9 clock providers on AM62. Update the driver with the 3 instances of clocks associated to a new compatible: "ti,am62-epwm-tbclk". [1] https://www.ti.com/lit/pdf/spruiv7 Signed-off-by: Georgi Vlaev Tested-by: Vignesh Raghavendra Link: https://lore.kernel.org/r/20220415190343.6284-3-g-vlaev@ti.com Reviewed-by: Nishanth Menon Signed-off-by: Stephen Boyd --- drivers/clk/keystone/syscon-clk.c | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'drivers/clk/keystone') diff --git a/drivers/clk/keystone/syscon-clk.c b/drivers/clk/keystone/syscon-clk.c index aae1a4076281..19198325b909 100644 --- a/drivers/clk/keystone/syscon-clk.c +++ b/drivers/clk/keystone/syscon-clk.c @@ -162,6 +162,13 @@ static const struct ti_syscon_gate_clk_data am64_clk_data[] = { { /* Sentinel */ }, }; +static const struct ti_syscon_gate_clk_data am62_clk_data[] = { + TI_SYSCON_CLK_GATE("epwm_tbclk0", 0x0, 0), + TI_SYSCON_CLK_GATE("epwm_tbclk1", 0x0, 1), + TI_SYSCON_CLK_GATE("epwm_tbclk2", 0x0, 2), + { /* Sentinel */ }, +}; + static const struct of_device_id ti_syscon_gate_clk_ids[] = { { .compatible = "ti,am654-ehrpwm-tbclk", @@ -171,6 +178,10 @@ static const struct of_device_id ti_syscon_gate_clk_ids[] = { .compatible = "ti,am64-epwm-tbclk", .data = &am64_clk_data, }, + { + .compatible = "ti,am62-epwm-tbclk", + .data = &am62_clk_data, + }, { } }; MODULE_DEVICE_TABLE(of, ti_syscon_gate_clk_ids); -- cgit v1.2.3