From c82009584edb36dade0598dce840bed725cfcd56 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Wed, 26 Oct 2022 02:21:23 +0100 Subject: clk: renesas: rzg2l: Fix typo in struct rzg2l_cpg_priv kerneldoc Fix typo pll5_mux_dsi_div_params -> mux_dsi_div_params Fixes the below warning (make W=1): drivers/clk/renesas/rzg2l-cpg.c:115: warning: Function parameter or member 'mux_dsi_div_params' not described in 'rzg2l_cpg_priv' Signed-off-by: Lad Prabhakar Link: https://lore.kernel.org/r/20221026012123.159790-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- drivers/clk/renesas/rzg2l-cpg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/clk/renesas') diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index be4868fa3971..dfd676310ce9 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -95,7 +95,7 @@ struct rzg2l_pll5_mux_dsi_div_param { * @num_resets: Number of Module Resets in info->resets[] * @last_dt_core_clk: ID of the last Core Clock exported to DT * @info: Pointer to platform data - * @pll5_mux_dsi_div_params: pll5 mux and dsi div parameters + * @mux_dsi_div_params: pll5 mux and dsi div parameters */ struct rzg2l_cpg_priv { struct reset_controller_dev rcdev; -- cgit v1.2.3