From f46efcc4746f5c1a539df9db625c04321f75e494 Mon Sep 17 00:00:00 2001 From: Ralph Siemsen Date: Wed, 18 May 2022 13:27:16 -0400 Subject: clk: renesas: r9a06g032: Drop some unused fields Remove unused fields from struct r9a06g032_clkdesc. As the D_UGATE macro no longer uses _gi, drop it from all declarations. Signed-off-by: Ralph Siemsen Reviewed-by: Phil Edworthy Link: https://lore.kernel.org/r/20220518172808.1691450-2-ralph.siemsen@linaro.org Link: https://lore.kernel.org/r/20220518172808.1691450-3-ralph.siemsen@linaro.org Signed-off-by: Geert Uytterhoeven --- drivers/clk/renesas/r9a06g032-clocks.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) (limited to 'drivers/clk/renesas') diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c index 35ffc462af1a..88865bb8bf94 100644 --- a/drivers/clk/renesas/r9a06g032-clocks.c +++ b/drivers/clk/renesas/r9a06g032-clocks.c @@ -51,11 +51,9 @@ struct r9a06g032_clkdesc { struct { u16 div, mul; }; - unsigned int factor; - unsigned int frequency; /* for dual gate */ struct { - uint16_t group : 1, index: 3; + uint16_t group : 1; u16 sel, g1, r1, g2, r2; } dual; }; @@ -85,10 +83,10 @@ struct r9a06g032_clkdesc { .source = 1 + R9A06G032_##_src, .name = _n, \ .reg = _reg, .div_min = _min, .div_max = _max, \ .div_table = { __VA_ARGS__ } } -#define D_UGATE(_idx, _n, _src, _g, _gi, _g1, _r1, _g2, _r2) \ +#define D_UGATE(_idx, _n, _src, _g, _g1, _r1, _g2, _r2) \ { .type = K_DUALGATE, .index = R9A06G032_##_idx, \ .source = 1 + R9A06G032_##_src, .name = _n, \ - .dual = { .group = _g, .index = _gi, \ + .dual = { .group = _g, \ .g1 = _g1, .r1 = _r1, .g2 = _g2, .r2 = _r2 }, } enum { K_GATE = 0, K_FFC, K_DIV, K_BITSEL, K_DUALGATE }; @@ -303,14 +301,14 @@ static const struct r9a06g032_clkdesc r9a06g032_clocks[] = { .dual.sel = ((0x34 / 4) << 5) | 30, .dual.group = 1, }, - D_UGATE(CLK_UART0, "clk_uart0", UART_GROUP_012, 0, 0, 0x1b2, 0x1b3, 0x1b4, 0x1b5), - D_UGATE(CLK_UART1, "clk_uart1", UART_GROUP_012, 0, 1, 0x1b6, 0x1b7, 0x1b8, 0x1b9), - D_UGATE(CLK_UART2, "clk_uart2", UART_GROUP_012, 0, 2, 0x1ba, 0x1bb, 0x1bc, 0x1bd), - D_UGATE(CLK_UART3, "clk_uart3", UART_GROUP_34567, 1, 0, 0x760, 0x761, 0x762, 0x763), - D_UGATE(CLK_UART4, "clk_uart4", UART_GROUP_34567, 1, 1, 0x764, 0x765, 0x766, 0x767), - D_UGATE(CLK_UART5, "clk_uart5", UART_GROUP_34567, 1, 2, 0x768, 0x769, 0x76a, 0x76b), - D_UGATE(CLK_UART6, "clk_uart6", UART_GROUP_34567, 1, 3, 0x76c, 0x76d, 0x76e, 0x76f), - D_UGATE(CLK_UART7, "clk_uart7", UART_GROUP_34567, 1, 4, 0x770, 0x771, 0x772, 0x773), + D_UGATE(CLK_UART0, "clk_uart0", UART_GROUP_012, 0, 0x1b2, 0x1b3, 0x1b4, 0x1b5), + D_UGATE(CLK_UART1, "clk_uart1", UART_GROUP_012, 0, 0x1b6, 0x1b7, 0x1b8, 0x1b9), + D_UGATE(CLK_UART2, "clk_uart2", UART_GROUP_012, 0, 0x1ba, 0x1bb, 0x1bc, 0x1bd), + D_UGATE(CLK_UART3, "clk_uart3", UART_GROUP_34567, 1, 0x760, 0x761, 0x762, 0x763), + D_UGATE(CLK_UART4, "clk_uart4", UART_GROUP_34567, 1, 0x764, 0x765, 0x766, 0x767), + D_UGATE(CLK_UART5, "clk_uart5", UART_GROUP_34567, 1, 0x768, 0x769, 0x76a, 0x76b), + D_UGATE(CLK_UART6, "clk_uart6", UART_GROUP_34567, 1, 0x76c, 0x76d, 0x76e, 0x76f), + D_UGATE(CLK_UART7, "clk_uart7", UART_GROUP_34567, 1, 0x770, 0x771, 0x772, 0x773), }; struct r9a06g032_priv { -- cgit v1.2.3