From 4287cd628f77de6ddaa1f458274a5337f373b040 Mon Sep 17 00:00:00 2001 From: Emil Renner Berthing Date: Wed, 20 Dec 2023 01:24:40 +0200 Subject: clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx This is needed by the dwmac-starfive ethernet driver to set the clock for 1000, 100 and 10 Mbps links properly. Signed-off-by: Emil Renner Berthing Signed-off-by: Cristian Ciocaltea Reviewed-by: Jacob Keller Link: https://lore.kernel.org/r/20231219232442.2460166-3-cristian.ciocaltea@collabora.com Signed-off-by: Stephen Boyd --- drivers/clk/starfive/clk-starfive-jh7100.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/clk') diff --git a/drivers/clk/starfive/clk-starfive-jh7100.c b/drivers/clk/starfive/clk-starfive-jh7100.c index d3b260c01d5c..03f6f26a15d8 100644 --- a/drivers/clk/starfive/clk-starfive-jh7100.c +++ b/drivers/clk/starfive/clk-starfive-jh7100.c @@ -200,7 +200,7 @@ static const struct jh71x0_clk_data jh7100_clk_data[] __initconst = { JH71X0_GDIV(JH7100_CLK_GMAC_GTX, "gmac_gtxclk", 0, 255, JH7100_CLK_GMAC_ROOT_DIV), JH71X0_GDIV(JH7100_CLK_GMAC_RMII_TX, "gmac_rmii_txclk", 0, 8, JH7100_CLK_GMAC_RMII_REF), JH71X0_GDIV(JH7100_CLK_GMAC_RMII_RX, "gmac_rmii_rxclk", 0, 8, JH7100_CLK_GMAC_RMII_REF), - JH71X0__MUX(JH7100_CLK_GMAC_TX, "gmac_tx", 0, 3, + JH71X0__MUX(JH7100_CLK_GMAC_TX, "gmac_tx", CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, 3, JH7100_CLK_GMAC_GTX, JH7100_CLK_GMAC_TX_INV, JH7100_CLK_GMAC_RMII_TX), -- cgit v1.2.3