From 6ce4fcb015a1a1290ffafcf3554901b40f9322df Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Mon, 24 Feb 2020 10:37:53 +0530 Subject: clocksource/drivers/timer-ti-dm: Do not update counter on updating the period Write to trigger register(OMAP_TIMER_TRIGGER_REG) will load the value in Load register(OMAP_TIMER_LOAD_REG) into Counter register (OMAP_TIMER_COUNTER_REG). omap_dm_timer_set_load() writes into trigger register every time load register is updated. When timer is configured in pwm mode, this causes disruption in current pwm cycle, which is not expected especially when pwm is used as PPS signal for synchronized PTP clocks. So do not write into trigger register on updating the period. Signed-off-by: Lokesh Vutla Tested-by: Tony Lindgren Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20200224050753.17784-3-lokeshvutla@ti.com --- drivers/clocksource/timer-ti-dm.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/clocksource') diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c index 269a994d6a99..acc93600d351 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -577,7 +577,6 @@ static int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); - omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); /* Save the context */ timer->context.tclr = l; timer->context.tldr = load; -- cgit v1.2.3