From aefa794efed40cc6f8225646d75deda879b98256 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Antoine=20T=C3=A9nart?= Date: Thu, 15 Jun 2017 09:56:18 +0200 Subject: crypto: inside-secure - fix the ring wr_cache offset The EIP197_HIA_xDR_CFG_WR_CACHE macro was defined to use an offset of 23, which is wrong as it's actually 25. Fix this. Reported-by: Igal Liberman Signed-off-by: Antoine Tenart Signed-off-by: Herbert Xu --- drivers/crypto/inside-secure/safexcel.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/crypto') diff --git a/drivers/crypto/inside-secure/safexcel.h b/drivers/crypto/inside-secure/safexcel.h index c17fdd40b99f..0328a9314b90 100644 --- a/drivers/crypto/inside-secure/safexcel.h +++ b/drivers/crypto/inside-secure/safexcel.h @@ -99,7 +99,7 @@ #define EIP197_HIA_xDR_WR_RES_BUF BIT(22) #define EIP197_HIA_xDR_WR_CTRL_BUG BIT(23) #define EIP197_HIA_xDR_WR_OWN_BUF BIT(24) -#define EIP197_HIA_xDR_CFG_WR_CACHE(n) (((n) & 0x7) << 23) +#define EIP197_HIA_xDR_CFG_WR_CACHE(n) (((n) & 0x7) << 25) #define EIP197_HIA_xDR_CFG_RD_CACHE(n) (((n) & 0x7) << 29) /* EIP197_HIA_CDR_THRESH */ -- cgit v1.2.3