From 7f6569f54695c18e13be2c538834fdd0fad1d3a6 Mon Sep 17 00:00:00 2001 From: Vincent Donnefort Date: Mon, 17 Jun 2013 14:03:49 +0200 Subject: gpio: ich: add GPO_BLINK support This patch makes sure blink hardware is disabled for selected GPIO. Blink hardware is controled by GPO_BLINK register and is available for GPIOs from 0 to 31. Signed-off-by: Vincent Donnefort Signed-off-by: Linus Walleij --- drivers/gpio/gpio-ich.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'drivers/gpio/gpio-ich.c') diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c index e16d932fd444..2729e3d2d5bb 100644 --- a/drivers/gpio/gpio-ich.c +++ b/drivers/gpio/gpio-ich.c @@ -41,12 +41,14 @@ enum GPIO_REG { GPIO_USE_SEL = 0, GPIO_IO_SEL, GPIO_LVL, + GPO_BLINK }; -static const u8 ichx_regs[3][3] = { +static const u8 ichx_regs[4][3] = { {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */ {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */ {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */ + {0x18, 0x18, 0x18}, /* BLINK offset */ }; static const u8 ichx_reglen[3] = { @@ -148,6 +150,10 @@ static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, int val) { + /* Disable blink hardware which is available for GPIOs from 0 to 31. */ + if (nr < 32) + ichx_write_bit(GPO_BLINK, nr, 0, 0); + /* Set GPIO output value. */ ichx_write_bit(GPIO_LVL, nr, val, 0); -- cgit v1.2.3