From 8cc8ccbaa5d89b65a32f0260b0cd2288d2c9b6dc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Otto=20Pfl=C3=BCger?= Date: Mon, 24 Jul 2023 08:56:53 +0200 Subject: drm/mipi-dbi: Lock SPI bus before setting D/C GPIO MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Multiple displays may be connected to the same bus and share a D/C GPIO, so the display driver needs exclusive access to the bus to ensure that it can control the D/C GPIO safely. Signed-off-by: Otto Pflüger Reviewed-by: Noralf Trønnes Acked-by: David Lechner Signed-off-by: Noralf Trønnes Link: https://patchwork.freedesktop.org/patch/msgid/20230724065654.5269-2-otto.pflueger@abscue.de --- drivers/gpu/drm/tiny/ili9225.c | 7 ++++++- drivers/gpu/drm/tiny/ili9486.c | 4 ++++ 2 files changed, 10 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm/tiny') diff --git a/drivers/gpu/drm/tiny/ili9225.c b/drivers/gpu/drm/tiny/ili9225.c index 077c6ff5a2e1..4ceb68ffac4b 100644 --- a/drivers/gpu/drm/tiny/ili9225.c +++ b/drivers/gpu/drm/tiny/ili9225.c @@ -316,19 +316,24 @@ static int ili9225_dbi_command(struct mipi_dbi *dbi, u8 *cmd, u8 *par, u32 speed_hz; int ret; + spi_bus_lock(spi->controller); gpiod_set_value_cansleep(dbi->dc, 0); speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 1); ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, cmd, 1); + spi_bus_unlock(spi->controller); if (ret || !num) return ret; if (*cmd == ILI9225_WRITE_DATA_TO_GRAM && !dbi->swap_bytes) bpw = 16; + spi_bus_lock(spi->controller); gpiod_set_value_cansleep(dbi->dc, 1); speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num); + ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num); + spi_bus_unlock(spi->controller); - return mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num); + return ret; } static const struct drm_simple_display_pipe_funcs ili9225_pipe_funcs = { diff --git a/drivers/gpu/drm/tiny/ili9486.c b/drivers/gpu/drm/tiny/ili9486.c index 02265c898816..938bceed5999 100644 --- a/drivers/gpu/drm/tiny/ili9486.c +++ b/drivers/gpu/drm/tiny/ili9486.c @@ -59,9 +59,11 @@ static int waveshare_command(struct mipi_dbi *mipi, u8 *cmd, u8 *par, * before being transferred as 8-bit on the big endian SPI bus. */ buf[0] = cpu_to_be16(*cmd); + spi_bus_lock(spi->controller); gpiod_set_value_cansleep(mipi->dc, 0); speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 2); ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, buf, 2); + spi_bus_unlock(spi->controller); if (ret || !num) goto free; @@ -79,9 +81,11 @@ static int waveshare_command(struct mipi_dbi *mipi, u8 *cmd, u8 *par, if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !mipi->swap_bytes) bpw = 16; + spi_bus_lock(spi->controller); gpiod_set_value_cansleep(mipi->dc, 1); speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num); ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, data, num); + spi_bus_unlock(spi->controller); free: kfree(buf); -- cgit v1.2.3