From fdc0f235d19492e64914ee60bb93a34d063a319b Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Fri, 30 Mar 2018 18:44:43 +0900 Subject: reset: uniphier: add PCIe reset control support Add reset lines for PCIe controller on UniPhier SoCs. This adds support for Pro5, LD20 and PXs3. Signed-off-by: Kunihiko Hayashi Acked-by: Masahiro Yamada Signed-off-by: Philipp Zabel --- drivers/reset/reset-uniphier.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/reset') diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index ac18f2f27881..d044b717fe49 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -73,6 +73,7 @@ static const struct uniphier_reset_data uniphier_pro5_sys_reset_data[] = { UNIPHIER_RESETX(12, 0x2000, 6), /* GIO (PCIe, USB3) */ UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */ UNIPHIER_RESETX(15, 0x2004, 17), /* USB31 */ + UNIPHIER_RESETX(24, 0x2008, 2), /* PCIe */ UNIPHIER_RESETX(40, 0x2000, 13), /* AIO */ UNIPHIER_RESET_END, }; @@ -115,6 +116,7 @@ static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = { UNIPHIER_RESETX(17, 0x200c, 13), /* USB30-PHY1 */ UNIPHIER_RESETX(18, 0x200c, 14), /* USB30-PHY2 */ UNIPHIER_RESETX(19, 0x200c, 15), /* USB30-PHY3 */ + UNIPHIER_RESETX(24, 0x200c, 4), /* PCIe */ UNIPHIER_RESETX(40, 0x2008, 0), /* AIO */ UNIPHIER_RESETX(41, 0x2008, 1), /* EVEA */ UNIPHIER_RESETX(42, 0x2010, 2), /* EXIV */ @@ -134,6 +136,7 @@ static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = { UNIPHIER_RESETX(18, 0x200c, 20), /* USB30-PHY2 */ UNIPHIER_RESETX(20, 0x200c, 17), /* USB31-PHY0 */ UNIPHIER_RESETX(21, 0x200c, 19), /* USB31-PHY1 */ + UNIPHIER_RESETX(24, 0x200c, 3), /* PCIe */ UNIPHIER_RESET_END, }; -- cgit v1.2.3 From 786367176d61cacaeaad90a2690c0637971323ea Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Fri, 30 Mar 2018 18:44:44 +0900 Subject: reset: uniphier: add SATA reset control support and change SATA-PHY ID Add reset lines for SATA controller on UniPhier SoCs. This adds support for Pro4 and PXs3 in addition to PXs2. And this changes the ID of the reset line for SATA-PHY on PXs2. Since some SoCs have two controller instances with a common PHY, this moves the ID of SATA-PHY for consistency. Signed-off-by: Kunihiko Hayashi Acked-by: Masahiro Yamada Signed-off-by: Philipp Zabel --- drivers/reset/reset-uniphier.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'drivers/reset') diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index d044b717fe49..55821846672b 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -63,6 +63,9 @@ static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = { UNIPHIER_RESETX(12, 0x2000, 6), /* GIO (Ether, SATA, USB3) */ UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */ UNIPHIER_RESETX(15, 0x2004, 17), /* USB31 */ + UNIPHIER_RESETX(28, 0x2000, 18), /* SATA0 */ + UNIPHIER_RESETX(29, 0x2004, 18), /* SATA1 */ + UNIPHIER_RESETX(30, 0x2000, 19), /* SATA-PHY */ UNIPHIER_RESETX(40, 0x2000, 13), /* AIO */ UNIPHIER_RESET_END, }; @@ -90,7 +93,7 @@ static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = { UNIPHIER_RESETX(20, 0x2014, 5), /* USB31-PHY0 */ UNIPHIER_RESETX(21, 0x2014, 1), /* USB31-PHY1 */ UNIPHIER_RESETX(28, 0x2014, 12), /* SATA */ - UNIPHIER_RESET(29, 0x2014, 8), /* SATA-PHY (active high) */ + UNIPHIER_RESET(30, 0x2014, 8), /* SATA-PHY (active high) */ UNIPHIER_RESETX(40, 0x2000, 13), /* AIO */ UNIPHIER_RESET_END, }; @@ -137,6 +140,9 @@ static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = { UNIPHIER_RESETX(20, 0x200c, 17), /* USB31-PHY0 */ UNIPHIER_RESETX(21, 0x200c, 19), /* USB31-PHY1 */ UNIPHIER_RESETX(24, 0x200c, 3), /* PCIe */ + UNIPHIER_RESETX(28, 0x200c, 7), /* SATA0 */ + UNIPHIER_RESETX(29, 0x200c, 8), /* SATA1 */ + UNIPHIER_RESETX(30, 0x200c, 21), /* SATA-PHY */ UNIPHIER_RESET_END, }; -- cgit v1.2.3 From d7bab65b1f57cdf2d81fc469cea6b2160a50e917 Mon Sep 17 00:00:00 2001 From: Katsuhiro Suzuki Date: Fri, 27 Apr 2018 09:41:21 +0900 Subject: reset: uniphier: add LD11/LD20 stream demux system reset control Add reset lines for MPEG2 transport stream I/O and demux system (HSC) on UniPhier LD11/LD20 SoCs. Signed-off-by: Katsuhiro Suzuki Acked-by: Masahiro Yamada Signed-off-by: Philipp Zabel --- drivers/reset/reset-uniphier.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/reset') diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index 55821846672b..e9030ff1bf2f 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -103,6 +103,7 @@ static const struct uniphier_reset_data uniphier_ld11_sys_reset_data[] = { UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */ UNIPHIER_RESETX(6, 0x200c, 6), /* Ether */ UNIPHIER_RESETX(8, 0x200c, 8), /* STDMAC (HSC, MIO) */ + UNIPHIER_RESETX(9, 0x200c, 9), /* HSC */ UNIPHIER_RESETX(40, 0x2008, 0), /* AIO */ UNIPHIER_RESETX(41, 0x2008, 1), /* EVEA */ UNIPHIER_RESETX(42, 0x2010, 2), /* EXIV */ @@ -114,6 +115,7 @@ static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = { UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */ UNIPHIER_RESETX(6, 0x200c, 6), /* Ether */ UNIPHIER_RESETX(8, 0x200c, 8), /* STDMAC (HSC) */ + UNIPHIER_RESETX(9, 0x200c, 9), /* HSC */ UNIPHIER_RESETX(14, 0x200c, 5), /* USB30 */ UNIPHIER_RESETX(16, 0x200c, 12), /* USB30-PHY0 */ UNIPHIER_RESETX(17, 0x200c, 13), /* USB30-PHY1 */ -- cgit v1.2.3