From 3196816ff64bb3a21fbda89e7355b6b87c3f50a0 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 12 Mar 2020 14:31:26 +0100 Subject: spi: meson-spicc: support max 80MHz clock The SPICC controller in Meson-AXG is capable of running at 80M clock. The ASIC IP is improved and the clock is actually running higher than previous old SoCs. Signed-off-by: Neil Armstrong Signed-off-by: Yixun Lan Signed-off-by: Sunny Luo Link: https://lore.kernel.org/r/20200312133131.26430-5-narmstrong@baylibre.com Signed-off-by: Mark Brown --- drivers/spi/spi-meson-spicc.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-meson-spicc.c b/drivers/spi/spi-meson-spicc.c index bd434d9055d9..710b4e780daa 100644 --- a/drivers/spi/spi-meson-spicc.c +++ b/drivers/spi/spi-meson-spicc.c @@ -35,7 +35,6 @@ * to have a CS go down over the full transfer */ -#define SPICC_MAX_FREQ 30000000 #define SPICC_MAX_BURST 128 /* Register Map */ @@ -132,6 +131,7 @@ #define SPICC_FIFO_HALF 10 struct meson_spicc_data { + unsigned int max_speed_hz; bool has_oen; bool has_enhance_clk_div; }; @@ -693,11 +693,9 @@ static int meson_spicc_probe(struct platform_device *pdev) master->transfer_one = meson_spicc_transfer_one; master->use_gpio_descriptors = true; - /* Setup max rate according to the Meson GX datasheet */ - if ((rate >> 2) > SPICC_MAX_FREQ) - master->max_speed_hz = SPICC_MAX_FREQ; - else - master->max_speed_hz = rate >> 2; + /* Setup max rate according to the Meson datasheet */ + master->max_speed_hz = min_t(unsigned int, rate >> 1, + spicc->data->max_speed_hz); meson_spicc_oen_enable(spicc); @@ -737,9 +735,11 @@ static int meson_spicc_remove(struct platform_device *pdev) } static const struct meson_spicc_data meson_spicc_gx_data = { + .max_speed_hz = 30000000, }; static const struct meson_spicc_data meson_spicc_axg_data = { + .max_speed_hz = 80000000, .has_oen = true, .has_enhance_clk_div = true, }; -- cgit v1.2.3